Desperately Seeking Solutions to the verification nightmare
Lauro Rizzatti, EVE USA EETimes (9/21/2010 12:19 PM EDT)
SoC design teams are desperate to find solutions to the verification nightmare. Solutions come in abundance, but not all are what they claim. A situation so outrageous it takes a new and versatile approach to solve it; for example, high-performance FPGA prototyping platforms.These days, the C in SoC could stand for "complexity" and not "chip" due to the explosion of embedded software just as design teams juggle hundreds of millions or even billions of gates. Several design teams currently budgeting for their next project have calculated that the software portion of a system on chip (SoC) is on an annual growth rate of 140 percent. Hardware is expanding at approximately 40 percent year to year. All this goes on as the time-to-market budget condenses and verification nightmares grow.
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