English
Choosing the right A/D converter architecture and IP to meet the latest high speed wireless standards
Priyank Shukla and Madhusudan Govindarajan (Cadence)
NewElectronics (October 14, 2014)
Internet enabled mobile devices are continuing to become more prevalent in the modern world. With this proliferation of smart, connected devices – many of which are battery powered – comes a greater need for power efficient wireless transceivers. In addition to meeting stringent power specifications, RF system designers must also ensure that their devices adhere to the latest wireless standards, including Long Term Evolution (LTE) and Wi-Fi.
In an RF system, the RF block interfaces with the antenna, and down-converts the RF signal to a baseband analogue signal. This article focuses on the analogue front end (AFE) block.
The AFE block is the critical bridge connecting RF sensor signal output to a digital application processor. However, ensuring the AFE block delivers the performance and low power required by the end application can be a formidable task.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
|
||||||
Cadence Hot IP
Related Articles
- How to cut power consumption for high-speed apps with A/D converter architecture
- Choosing the right memory for high performance FPGA platforms
- Choosing serial interfaces for high speed ADCs in medical apps
- Stacking up high-speed Bluetooth against Certified Wireless USB
- High Speed, Low Power and Flexibility Drive DisplayPort's Increasing Popularity