Search for EDA Tools.

Match All Match Any    OR Select a Specific Supplier ... Abtech SystemsACE Associated Compiler Experts bvAgilent TechnologiesAgnisys Inc.AgO IncAldec, Inc.Algotronix Ltd.Altos Design AutomationamsAnalog Bits Inc.Analog RailsAnasift Technology, Inc.Anasim Corp.Anchor Hill CommunicationsAnchor Semiconductor, Inc.ANSYSApache Design Solutions, Inc.Applied Simulation TechnologyApplied Wave Research, Inc.Arasan Chip SystemsARMArtwork Conversion Software, Inc.ASYGNAtoptechAtrenta Inc.AttachmateAverant, Inc.Avery Design Systems, Inc.Axiom Design AutomationBerkeley Design Automation, Inc.Blue Pearl SoftwareBluespec, Inc.Breker Verification SystemsBrion TechnologiesCAD Science, Inc.Cadence Design Systems, Inc.Calypto Design SystemsCarbon Design Systems, Inc.CAST, Inc.Center for Embedded Computer SystemsChipVision Design SystemsClioSoft, Inc.CLK Design Automation, Inc.CoFluent DesignConcept Engineering GmbHConcurrent EDACoupling Wave SolutionsCredo SemiconductorCriticalBlueDataramDeFacTo TechnologiesDenali Software, Inc.Design and ReuseDini Group (The)Dolphin IntegrationDoulosDynalith Systems Co., Ltd.Dyumnin TechnologiesEDAptability e.K.EdXactElgris Technologies, Inc.EMA Design Automation, Inc.eMemory Technology Inc.Entasys Design, Inc.EVEEvolvable Systems Research Institute, Inc.FishTail Design AutomationForte Design SystemsFTL Systems, Inc.Gaisler Research ABGenesys Testware, Inc.GiDELGradient Design AutomationHCL TechnologiesHD Lab, Inc.Helic S.A.HOTBENCH.NETHOY TechnologiesIC ManageImperas, Inc.IN2FAB TechnologyIncentia Design Systems, Inc.Innovative Silicon Inc.Intellitech Corp.InternetCAD.com, Inc.Interoperable PCell LibrariesInterra Systems, Inc.IP CompilersJasper Design Automation, Inc.Javelin Design Automation, Inc.JEDA TechnologiesKilopass Technology, Inc.Legend Design Technology, Inc.Library Technologies, Inc.Liga Systems, Inc.Lorentz SolutionLynguent, Inc.Magillem Design ServicesMathWorks, Inc. (The)Mentor Graphics Corp.Micro Magic, Inc.Micrologic Design AutomationMirabilis Design Inc.Mixel, Inc.MOSAIDMOSISMunEDA GmbHMyCAD, Inc.NangateNannor Technologies, Inc.National Instruments Corp.Nimbic (formerly Physware)Obsidian Software, Inc.OCP International PartnershipOEA International, Inc.OneSpin Solutions GmbHOpen iT, Inc.OptEM Engineering Inc.Orora Design TechnologiesPDF SolutionsPentaLogix, Inc.PLDAPlurality Ltd.Proficient Design, LLCProlific, Inc.Pulsic Ltd.QThinkQuik-PakRaisonance Real Intent, Inc.Runtime Design AutomationSagantecSamtec, Inc.Saratoga Data Systems, Inc.Scarlet Code LTDSemifore, Inc.Shearwater Group, Inc.Sigrity, Inc.Silicon Design SolutionsSilicon Frontline TechnologySilicon HiveSilicon ImageSoftJin Technologies Pvt. Ltd.Solido Design Automation Inc.Space CodesignSwati DesignSynopsys, Inc.SynTest Technologies, Inc.Tachyon Design AutomationTakumi Technology Corp.Tanner EDATarget Compiler TechnologiesTata ElxsiTeklatechTemento SystemsTOOL Corp.Triad Semiconductor, Inc.True Circuits, Inc.TSMCTSSI - Test Systems Strategies, Inc.Tuscany Design Automation, Inc.UniquifyVerific Design AutomationVeritools, Inc.Virage Logic Corp.VISENGIXYALISZ Circuit Automation, Inc. EDA Supplier: list your tools for free in this catalog.

Browse for EDA Tools CAE RT Acceleration and Emulation, DFT Tools, EMI Design, Formal Analysis, Formal Verification, HW/SW Co-Verification, Intelligent Test Bench, Metal-Migration Design, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design, Silicon Virtual Prototype, Synthesis, Thermal Design, Timing Design, Verification, Verilog Simulation, VHDL Simulation CAE Gate Level Acceleration and Emulation, Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture CAE Other Design Libraries, Enterprise Tools, Interoperability Tools CAD/CAM ASIC Layout, Custom Layout, Delay Calculation, DRC, EMI Analysis, Extractors, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Library Development Tools, Lithography, Mask Design, MCM, Hybrid and Packaging Design, Metal - Migration Analysis, PCB CAM, PCB Design, PCB SPICE, PCB Virtual Prototype, Physical Libraries, Power Analysis, Process Migration, RET, Reverse Synthesis, Signal - Integrity Analysis, T-Cad, Target Compiler, Thermal Analysis, Timing Analysis Embedded Systems Compiler, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Logic Synthesis, ESL Power Analysis, ESL Simulation, ESL Test and Verification, Libraries, RTOS, Temporal Analysis Application Specific DSP, Memory, MEMS, Networking, Telecomms, Wireless Design Reuse Design IP, Verification IP Services Design Services, IC Foundry, Training and Consulting Other

Latest EDA News

• Cadence Introduces the Tempus Timing Signoff Solution, Delivering Unprecedented Performance and Capacity in Design Closure and Signoff (May. 20, 2013)
  Cadence today introduced the Tempus™ Timing Signoff Solution, a new static timing analysis and closure tool designed to enable SoC developers to speed timing closure and move chip designs to fabrication quickly.
• OneSpin Solutions Reaches for the Cloud, Driving New Technology, Business Model for Easy Adoption (May. 15, 2013)
  OneSpin Solutions today unveiled a new business model based on Cloud Computing designed to give project teams flexibility previously unavailable for electronic design automation (EDA) tools, while eliminating barriers to adoption.
• Forte Design Systems Announces Cynthesizer 5 SystemC High-Level Synthesis (May. 15, 2013)
  Forte Design Systems today unwrapped its enhanced Cynthesizer™ SystemC-based high-level synthesis (HLS) product. The new version includes low power synthesis capabilities, core synthesis algorithms, and a new SystemC integrated development environment (IDE).
• High-Level Synthesis Software from Forte Design Systems Adopted by LG (May. 15, 2013)
  Forte Design Systems today announced that LG Electronics of Seoul, Korea, has adopted Cynthesizer™ SystemC high-level synthesis (HLS) for its next-generation digital television (DTV) design project.
• Jasper Makes Formal Verification Power-Aware with a New Low Power App for Verification of SOCs with Multiple Power Domains (May. 14, 2013)
  Jasper Design Automation has announced the availability of its new JasperGold® Low Power Verification App (JG-LPV App) which enables users to utilize formal methods for the verification of SOC designs optimized for lower power consumption with multiple voltage and power-management domains.
• Achronix Tapes Out Industry's First FinFET-based System-on-Chip Using Synopsys' IC Compiler and IC Validator (May. 13, 2013)
  Synopsys today announced that Achronix Semiconductor has successfully used both Synopsys' IC Compiler™ physical design and IC Validator physical verification solutions to sign off its Speedster22i® FPGA – the industry's first system-on-chip (SoC) design using FinFET transistors.
• Cadence Characterization Solution for Complex Multi-bit Cells Delivers Power and Performance Benefits for Yamaha (May. 13, 2013)
  Cadence today announced that it helped Yamaha Corporation reduce power consumption for its mobile consumer chips with characterization tools that delivered a 10 percent reduction in dynamic power to the clock network required for Yamaha ASICs.
• HiSilicon Technologies Tapes Out 50+ Million Instance ARM Processor-based SoC Using Synopsys IC Compiler (May. 08, 2013)
  Synopsys today announced that HiSilicon has taped out a 50+ million instance ARM® Cortex™-A15 processor based system-on-chip (SoC) using Synopsys' IC Compiler, a key component of Synopsys' Galaxy™ Implementation Platform.
• Cadence Incisive Enterprise Simulator Improves Low-Power Verification Productivity By 30% (May. 07, 2013)
  Cadence today introduced a new version of Incisive® Enterprise Simulator, with features that improve low-power verification productivity of complex SoCs by 30 percent.
• Latest Release of Synopsys IC Compiler Introduces New Technologies to Further Speed Design Closure (May. 06, 2013)
  Synopsys today announced the availability of the 2013.03 release of its IC Compiler™ software, a key component of Synopsys' Galaxy™ Implementation Platform. New features include advanced optimizations to enable high-speed design, efficient implementation of final-stage engineering change orders (ECO) and fully color-ready, tapeout-proven support for the emerging FinFET-based silicon processes.