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IC Manage
Industrial Strength Design Management CORE COMPETENCY:Analog Design, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, Interoperability Tools, ASIC Layout, Custom Layout, IC Implementation, Library Development Tools, ESL Design and Entry, Design IP, Verification IP, RTL Design and Entry Headquarter: United States |
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GiDEL
CORE COMPETENCY:Acceleration and Emulation, FPGA/PLD, ESL Co-Verification, Libraries, DSP, Memory, Networking, Telecomms, Wireless, Design Services, Silicon Virtual Prototype, Verification, Acceleration and Emulation, HW/SW Co-Verification, Intelligent Test Bench, Mixed Language Simulation Headquarter: United States |
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Genesys Testware, Inc.
Optimize yield, quality and cost of nanometer ICs CORE COMPETENCY:ESL Test and Verification, DFT Tools Headquarter: United States |
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FTL Systems, Inc.
CORE COMPETENCY:Acceleration and Emulation, Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Enterprise Tools, Delay Calculation, FPGA/PLD, IC SPICE and SPICE-like Simulation, Power Analysis, Target Compiler, Timing Analysis, Compiler, Debugger, ESL Co-Verification, ESL Logic Synthesis, ESL Simulation, ESL Test and Verification, Silicon Virtual Prototype, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Acceleration and Emulation, EMI Design, Formal Verification, HW/SW Co-Verification, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry Headquarter: United States |
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Forte Design Systems
CORE COMPETENCY:ESL Design and Entry, ESL Logic Synthesis, ESL Power Analysis, ESL Simulation, ESL Test and Verification, Synthesis Headquarter: United States |
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FishTail Design Automation
The Golden Timing Constraints Company CORE COMPETENCY:Synthesis, Timing Design, Formal Analysis, RTL Design and Entry Headquarter: United States |
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Entasys Design, Inc.
CORE COMPETENCY:Power Analysis, Signal - Integrity Analysis, ESL Design and Entry, ESL Power Analysis, Silicon Virtual Prototype, Signal-Integrity Design Headquarter: South Korea |
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EMA Design Automation, Inc.
CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, ASIC Layout, Custom Layout, Delay Calculation, DRC, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Library Development Tools, MCM, Hybrid and Packaging Design, PCB CAM, PCB Design, PCB SPICE, Power Analysis, Signal - Integrity Analysis, Thermal Analysis, Timing Analysis, Training and Consulting, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Verification, Formal Analysis, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design Headquarter: United States |
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Dynalith Systems Co., Ltd.
CORE COMPETENCY:Acceleration and Emulation, Gate Level Simulation, FPGA/PLD, ESL Co-Verification, ESL Simulation, ESL Test and Verification, RTOS, DSP, Networking, Telecomms, Verification IP, Training and Consulting, Silicon Virtual Prototype, Verilog Simulation, VHDL Simulation, Verification, Acceleration and Emulation, HW/SW Co-Verification, RTL Design and Entry Headquarter: South Korea |
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Dini Group (The)
CORE COMPETENCY:Acceleration and Emulation, Gate Level/Transistor Level Design, ESL Simulation, ESL Test and Verification, Design Services, Silicon Virtual Prototype, Acceleration and Emulation Headquarter: United States |
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DeFacTo Technologies
CORE COMPETENCY:DFT Tools Headquarter: France |
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Concept Engineering GmbH
CORE COMPETENCY:Gate Level/Transistor Level Design, DRC, Signal - Integrity Analysis, Verification, RTL Design and Entry, Signal-Integrity Design Headquarter: Germany |
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ClioSoft, Inc.
Empowering Global Collaboration and Design Data Management CORE COMPETENCY:Analog Design, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, ASIC Layout, Custom Layout, IC Implementation, Library Development Tools, ESL Design and Entry, Design IP, Verification IP, RTL Design and Entry Headquarter: United States |
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Carbon Design Systems, Inc.
Software Before Silicon CORE COMPETENCY:Debugger, ESL Co-Verification, ESL Simulation, Networking, Telecomms, Wireless, Design IP, Verification IP, Verilog Simulation, VHDL Simulation, Acceleration and Emulation, HW/SW Co-Verification, Mixed Language Simulation Headquarter: United States |
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Calypto Design Systems
Bridging System and RTL CORE COMPETENCY:ASIC Layout, IC Implementation, Power Analysis, Debugger, ESL Test and Verification, Temporal Analysis, DSP, Networking, Telecomms, Wireless, Verification IP, Verification, Formal Verification Headquarter: United States |
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Breker Verification Systems
Predictable Path to 100% Verification Plan Coverage CORE COMPETENCY:DSP, Memory, MEMS, Networking, Telecomms, Wireless, Verification IP, Design Services, Training and Consulting, Verilog Simulation, VHDL Simulation, Verification, Intelligent Test Bench, Mixed Language Simulation Headquarter: United States |
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Bluespec, Inc.
Reinventing Hardware Design(tm) CORE COMPETENCY:ESL Co-Verification, ESL Design and Entry, ESL Logic Synthesis, ESL Power Analysis, ESL Simulation, ESL Test and Verification, Design IP, Verification IP, Design Services, Synthesis, Verification, Acceleration and Emulation, RTL Design and Entry Headquarter: United States |
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Blue Pearl Software
CORE COMPETENCY:IC Implementation, Timing Analysis, Synthesis, Timing Design, DFT Tools, Formal Analysis, Formal Verification, RTL Design and Entry Headquarter: United States |
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Berkeley Design Automation, Inc.
CORE COMPETENCY:Mixed Signal Simulation Headquarter: United States |
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Axiom Design Automation
Delivering Verification Performance CORE COMPETENCY:Gate Level Simulation, DSP, Design IP, Verification IP, Design Services, Verilog Simulation, Formal Analysis, Formal Verification, Intelligent Test Bench, RTL Design and Entry Headquarter: United States |
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Avery Design Systems, Inc.
CORE COMPETENCY:Acceleration and Emulation, Verification IP, Verification, Formal Verification, Intelligent Test Bench Headquarter: United States |
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Averant, Inc.
Solidify your design. CORE COMPETENCY:Formal Verification Headquarter: United States |
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Atrenta Inc.
Think Early Design Closure! Think Atrenta! CORE COMPETENCY:IC Implementation, Power Analysis, Timing Analysis, ESL Design and Entry, ESL Power Analysis, Verification IP, Silicon Virtual Prototype, DFT Tools, Formal Analysis, Formal Verification, Power Design, RTL Design and Entry Headquarter: United States |
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Applied Wave Research, Inc.
CORE COMPETENCY:Analog Design, Analog Simulation, RF Design and Simulation, Schematic Capture, Design Libraries, Custom Layout, DRC, EMI Analysis, IC Implementation, IC SPICE and SPICE-like Simulation, Library Development Tools, MCM, Hybrid and Packaging Design, PCB Design, PCB SPICE, ESL Simulation, Mixed Signal Simulation, Signal-Integrity Design Headquarter: United States |
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Applied Simulation Technology
Advanced Simulation for High Speed Design CORE COMPETENCY:Analog Simulation, Gate Level/Transistor Level Design, Delay Calculation, EMI Analysis, Extractors, IC SPICE and SPICE-like Simulation, PCB SPICE, Power Analysis, Signal - Integrity Analysis, EMI Design, Signal-Integrity Design Headquarter: United States |
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ANSYS
CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, Interoperability Tools, EMI Analysis, Extractors, IC SPICE and SPICE-like Simulation, MCM, Hybrid and Packaging Design, Power Analysis, Signal - Integrity Analysis, Thermal Analysis, Memory, MEMS, Networking, Telecomms, Wireless, Signal-Integrity Design Headquarter: United States |
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Anasift Technology, Inc.
CORE COMPETENCY:Analog Design, Analog Simulation, Design Services, Mixed Signal Simulation Headquarter: United States |
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Altos Design Automation
Improve your view... CORE COMPETENCY:Gate Level Simulation, Gate Level/Transistor Level Design, Design Libraries, Delay Calculation, IC SPICE and SPICE-like Simulation, Library Development Tools, Physical Libraries, Power Analysis, Signal - Integrity Analysis, Timing Analysis, Verilog Simulation, VHDL Simulation, Timing Design, Power Design, Signal-Integrity Design Headquarter: United States |
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Aldec, Inc.
The Design Verification Company CORE COMPETENCY:Acceleration and Emulation, Gate Level Simulation, Schematic Capture, ESL Co-Verification, ESL Design and Entry, ESL Simulation, Design IP, Verilog Simulation, VHDL Simulation, Verification, Acceleration and Emulation, HW/SW Co-Verification, Mixed Language Simulation, RTL Design and Entry Headquarter: United States |
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