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Design and Reuse
The Catalyst of Collaborative IP Based SoC Design CORE COMPETENCY:Enterprise Tools, Design IP, Verification IP, Design Services, Training and Consulting Headquarter: France | Founded: 1997 | Size: 15 employees |
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Cadence Design Systems, Inc.
CORE COMPETENCY:Acceleration and Emulation, Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Enterprise Tools, Interoperability Tools, ASIC Layout, Custom Layout, Delay Calculation, DRC, Extractors, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Lithography, Mask Design, MCM, Hybrid and Packaging Design, Metal - Migration Analysis, PCB CAM, PCB Design, PCB SPICE, PCB Virtual Prototype, Physical Libraries, Power Analysis, Process Migration, RET, Reverse Synthesis, Signal - Integrity Analysis, Thermal Analysis, Timing Analysis, Compiler, ESL Co-Verification, ESL Design and Entry, ESL Logic Synthesis, ESL Power Analysis, ESL Simulation, ESL Test and Verification, DSP, Memory, MEMS, Networking, Telecomms, Wireless, Design IP, Verification IP, Design Services, Training and Consulting, Silicon Virtual Prototype, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Verification, Thermal Design, Acceleration and Emulation, DFT Tools, Formal Analysis, Formal Verification, HW/SW Co-Verification, Intelligent Test Bench, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design Headquarter: United States | Founded: 1988 | Size: 5200 employees |
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Mentor Graphics Corp.
EDA Technology Leader CORE COMPETENCY:Acceleration and Emulation, Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, Custom Layout, Delay Calculation, DRC, EMI Analysis, Extractors, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Library Development Tools, Lithography, Mask Design, MCM, Hybrid and Packaging Design, PCB CAM, PCB Design, PCB SPICE, PCB Virtual Prototype, Physical Libraries, RET, Signal - Integrity Analysis, Thermal Analysis, Timing Analysis, Compiler, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Logic Synthesis, ESL Simulation, ESL Test and Verification, Libraries, RTOS, DSP, Memory, Networking, Telecomms, Wireless, Design IP, Verification IP, Training and Consulting, Synthesis, Verilog Simulation, VHDL Simulation, Verification, Acceleration and Emulation, DFT Tools, EMI Design, Formal Analysis, Formal Verification, HW/SW Co-Verification, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design Headquarter: United States | Founded: 1981 | Size: 4200 employees |
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Denali Software, Inc.
The world leader in chip interface design and verification. CORE COMPETENCY:Enterprise Tools, Interoperability Tools, ESL Co-Verification, ESL Design and Entry, ESL Simulation, ESL Test and Verification, Memory, Design IP, Verification IP, Silicon Virtual Prototype, Verilog Simulation, VHDL Simulation, Timing Design, Intelligent Test Bench Headquarter: United States |
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Algotronix Ltd.
CORE COMPETENCY:Design Libraries, Enterprise Tools, Design IP, Design Services, Training and Consulting Headquarter: United Kingdom |
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HOTBENCH.NET
Create your VHDL & Verilog testbench fast CORE COMPETENCY:Acceleration and Emulation, Enterprise Tools, DSP, Memory, Networking, Telecomms, Wireless, Verilog Simulation, VHDL Simulation, Verification, Intelligent Test Bench, RTL Design and Entry Headquarter: India |
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TSSI - Test Systems Strategies, Inc.
Global Innovator of Design-to-Test Software CORE COMPETENCY:Gate Level Simulation, Enterprise Tools, Interoperability Tools, Debugger, Training and Consulting, Verilog Simulation, VHDL Simulation, Verification, DFT Tools, Intelligent Test Bench Headquarter: United States |
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Tanner EDA
Speeding Concept to Silicon CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, ASIC Layout, Custom Layout, DRC, Extractors, IC SPICE and SPICE-like Simulation, Lithography, Mask Design, MEMS, Verification, Mixed Signal Simulation Headquarter: United States |
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Open iT, Inc.
Open iT creates software for IT resource monitoring and reporting. CORE COMPETENCY:Enterprise Tools Headquarter: United States |
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IC Manage
Industrial Strength Design Management CORE COMPETENCY:Analog Design, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, Interoperability Tools, ASIC Layout, Custom Layout, IC Implementation, Library Development Tools, ESL Design and Entry, Design IP, Verification IP, RTL Design and Entry Headquarter: United States |
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FTL Systems, Inc.
CORE COMPETENCY:Acceleration and Emulation, Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Enterprise Tools, Delay Calculation, FPGA/PLD, IC SPICE and SPICE-like Simulation, Power Analysis, Target Compiler, Timing Analysis, Compiler, Debugger, ESL Co-Verification, ESL Logic Synthesis, ESL Simulation, ESL Test and Verification, Silicon Virtual Prototype, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Acceleration and Emulation, EMI Design, Formal Verification, HW/SW Co-Verification, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry Headquarter: United States |
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ClioSoft, Inc.
Empowering Global Collaboration and Design Data Management CORE COMPETENCY:Analog Design, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, ASIC Layout, Custom Layout, IC Implementation, Library Development Tools, ESL Design and Entry, Design IP, Verification IP, RTL Design and Entry Headquarter: United States |
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Attachmate
CORE COMPETENCY:Enterprise Tools, Interoperability Tools, Networking Headquarter: United States |
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ANSYS
CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, Interoperability Tools, EMI Analysis, Extractors, IC SPICE and SPICE-like Simulation, MCM, Hybrid and Packaging Design, Power Analysis, Signal - Integrity Analysis, Thermal Analysis, Memory, MEMS, Networking, Telecomms, Wireless, Signal-Integrity Design Headquarter: United States |
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