|
Cadence Design Systems, Inc.
CORE COMPETENCY:Acceleration and Emulation, Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Enterprise Tools, Interoperability Tools, ASIC Layout, Custom Layout, Delay Calculation, DRC, Extractors, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Lithography, Mask Design, MCM, Hybrid and Packaging Design, Metal - Migration Analysis, PCB CAM, PCB Design, PCB SPICE, PCB Virtual Prototype, Physical Libraries, Power Analysis, Process Migration, RET, Reverse Synthesis, Signal - Integrity Analysis, Thermal Analysis, Timing Analysis, Compiler, ESL Co-Verification, ESL Design and Entry, ESL Logic Synthesis, ESL Power Analysis, ESL Simulation, ESL Test and Verification, DSP, Memory, MEMS, Networking, Telecomms, Wireless, Design IP, Verification IP, Design Services, Training and Consulting, Silicon Virtual Prototype, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Verification, Thermal Design, Acceleration and Emulation, DFT Tools, Formal Analysis, Formal Verification, HW/SW Co-Verification, Intelligent Test Bench, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design
Headquarter: United States | Founded: 1988 | Size: 5200 employees
|
Mentor Graphics Corp.
EDA Technology Leader
CORE COMPETENCY:Acceleration and Emulation, Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, Custom Layout, Delay Calculation, DRC, EMI Analysis, Extractors, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Library Development Tools, Lithography, Mask Design, MCM, Hybrid and Packaging Design, PCB CAM, PCB Design, PCB SPICE, PCB Virtual Prototype, Physical Libraries, RET, Signal - Integrity Analysis, Thermal Analysis, Timing Analysis, Compiler, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Logic Synthesis, ESL Simulation, ESL Test and Verification, Libraries, RTOS, DSP, Memory, Networking, Telecomms, Wireless, Design IP, Verification IP, Training and Consulting, Synthesis, Verilog Simulation, VHDL Simulation, Verification, Acceleration and Emulation, DFT Tools, EMI Design, Formal Analysis, Formal Verification, HW/SW Co-Verification, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design
Headquarter: United States | Founded: 1981 | Size: 4200 employees
|
Synopsys, Inc.
Helping You Design The Chip Inside
CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Design Libraries, Interoperability Tools, ASIC Layout, Custom Layout, Delay Calculation, DRC, EMI Analysis, Extractors, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Library Development Tools, Lithography, Mask Design, Physical Libraries, Power Analysis, RET, Signal - Integrity Analysis, T-Cad, Timing Analysis, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Simulation, ESL Test and Verification, Libraries, DSP, Memory, Networking, Telecomms, Wireless, Design IP, Verification IP, IC Foundry, Training and Consulting, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Verification, DFT Tools, EMI Design, Formal Analysis, Formal Verification, HW/SW Co-Verification, Intelligent Test Bench, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design
Headquarter: United States | Founded: 1986 | Size: 5100 employees
|
TOOL Corp.
CORE COMPETENCY:ASIC Layout, Custom Layout, DRC, IC DFM Tools, IC Implementation, Lithography, Mask Design, Physical Libraries, RET, Signal - Integrity Analysis, Thermal Analysis, Timing Analysis
Headquarter: Japan | Founded: 2002 | Size: 74 employees
|
Tanner EDA
Speeding Concept to Silicon
CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, ASIC Layout, Custom Layout, DRC, Extractors, IC SPICE and SPICE-like Simulation, Lithography, Mask Design, MEMS, Verification, Mixed Signal Simulation
Headquarter: United States
|
Takumi Technology Corp.
CORE COMPETENCY:Design Libraries, Custom Layout, DRC, IC DFM Tools, IC Implementation, Library Development Tools, Lithography, Mask Design, Physical Libraries, RET, T-Cad, Libraries, Design IP, Design Services
Headquarter: United States
|
Shearwater Group, Inc.
CORE COMPETENCY:Custom Layout, IC DFM Tools, IC Implementation, Lithography, Mask Design, RET
Headquarter: United States
|
Saratoga Data Systems, Inc.
Application Acceleration
CORE COMPETENCY:ASIC Layout, Custom Layout, IC DFM Tools, IC Implementation, Lithography, Mask Design
Headquarter: United States
|
Nannor Technologies, Inc.
CORE COMPETENCY:ASIC Layout, IC DFM Tools, IC Implementation, Lithography
Headquarter: United States
|
MyCAD, Inc.
CORE COMPETENCY:ASIC Layout, Custom Layout, DRC, Extractors, IC SPICE and SPICE-like Simulation, Lithography, Mask Design
Headquarter: United States
|
Brion Technologies
Lithography-Driven Design & Manufacturing
CORE COMPETENCY:IC DFM Tools, Lithography, RET
Headquarter: United States
|
ams
CORE COMPETENCY:Design Libraries, ASIC Layout, Custom Layout, Delay Calculation, DRC, Extractors, IC Implementation, IC SPICE and SPICE-like Simulation, Lithography, Mask Design, Physical Libraries, T-Cad, Libraries, DSP, Memory, Design IP
Headquarter: United States
|
Artwork Conversion Software, Inc.
CAD Translators, Plotting and PostProcessing
CORE COMPETENCY:Extractors, Lithography, Mask Design, MCM, Hybrid and Packaging Design
Headquarter: United States
|