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Design and Reuse
The Catalyst of Collaborative IP Based SoC Design
CORE COMPETENCY:Enterprise Tools, Design IP, Verification IP, Design Services, Training and Consulting
Headquarter: France
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Cadence Design Systems, Inc.
CORE COMPETENCY:Acceleration and Emulation, Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Enterprise Tools, Interoperability Tools, ASIC Layout, Custom Layout, Delay Calculation, DRC, Extractors, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Lithography, Mask Design, MCM, Hybrid and Packaging Design, Metal - Migration Analysis, PCB CAM, PCB Design, PCB SPICE, PCB Virtual Prototype, Physical Libraries, Power Analysis, Process Migration, RET, Reverse Synthesis, Signal - Integrity Analysis, Thermal Analysis, Timing Analysis, Compiler, ESL Co-Verification, ESL Design and Entry, ESL Logic Synthesis, ESL Power Analysis, ESL Simulation, ESL Test and Verification, DSP, Memory, MEMS, Networking, Telecomms, Wireless, Design IP, Verification IP, Design Services, Training and Consulting, Silicon Virtual Prototype, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Verification, Thermal Design, Acceleration and Emulation, DFT Tools, Formal Analysis, Formal Verification, HW/SW Co-Verification, Intelligent Test Bench, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design
Headquarter: United States
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Mentor Graphics Corp.
EDA Technology Leader
CORE COMPETENCY:Acceleration and Emulation, Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, Custom Layout, Delay Calculation, DRC, EMI Analysis, Extractors, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Library Development Tools, Lithography, Mask Design, MCM, Hybrid and Packaging Design, PCB CAM, PCB Design, PCB SPICE, PCB Virtual Prototype, Physical Libraries, RET, Signal - Integrity Analysis, Thermal Analysis, Timing Analysis, Compiler, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Logic Synthesis, ESL Simulation, ESL Test and Verification, Libraries, RTOS, DSP, Memory, Networking, Telecomms, Wireless, Design IP, Verification IP, Training and Consulting, Synthesis, Verilog Simulation, VHDL Simulation, Verification, Acceleration and Emulation, DFT Tools, EMI Design, Formal Analysis, Formal Verification, HW/SW Co-Verification, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design
Headquarter: United States
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Synopsys, Inc.
Helping You Design The Chip Inside
CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Design Libraries, Interoperability Tools, ASIC Layout, Custom Layout, Delay Calculation, DRC, EMI Analysis, Extractors, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Library Development Tools, Lithography, Mask Design, Physical Libraries, Power Analysis, RET, Signal - Integrity Analysis, T-Cad, Timing Analysis, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Simulation, ESL Test and Verification, Libraries, DSP, Memory, Networking, Telecomms, Wireless, Design IP, Verification IP, IC Foundry, Training and Consulting, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Verification, DFT Tools, EMI Design, Formal Analysis, Formal Verification, HW/SW Co-Verification, Intelligent Test Bench, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design
Headquarter: United States
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Denali Software, Inc.
The world leader in chip interface design and verification.
CORE COMPETENCY:Enterprise Tools, Interoperability Tools, ESL Co-Verification, ESL Design and Entry, ESL Simulation, ESL Test and Verification, Memory, Design IP, Verification IP, Silicon Virtual Prototype, Verilog Simulation, VHDL Simulation, Timing Design, Intelligent Test Bench
Headquarter: United States
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Algotronix Ltd.
CORE COMPETENCY:Design Libraries, Enterprise Tools, Design IP, Design Services, Training and Consulting
Headquarter: United Kingdom
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Elgris Technologies, Inc.
CORE COMPETENCY:Gate Level/Transistor Level Design, Interoperability Tools, PCB Design, Reverse Synthesis, Verification, RTL Design and Entry
Headquarter: USA
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HOTBENCH.NET
Create your VHDL & Verilog testbench fast
CORE COMPETENCY:Acceleration and Emulation, Enterprise Tools, DSP, Memory, Networking, Telecomms, Wireless, Verilog Simulation, VHDL Simulation, Verification, Intelligent Test Bench, RTL Design and Entry
Headquarter: India
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Raisonance
CORE COMPETENCY:Interoperability Tools, Compiler, Debugger, ESL Simulation, ESL Test and Verification, Libraries, RTOS, Wireless, Design Services
Headquarter: France
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Scarlet Code LTD
Automate the creation of IP-XACT
CORE COMPETENCY:Interoperability Tools, ESL Design and Entry, Design IP, Design Services, HW/SW Co-Verification
Headquarter: Essex
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Virage Logic Corp.
Accelerating Silicon Success
CORE COMPETENCY:Design Libraries, IC DFM Tools, Library Development Tools, Physical Libraries, Compiler, Debugger, Libraries, Memory, Networking, Telecomms, Wireless, Design IP, DFT Tools
Headquarter: United States
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TSSI - Test Systems Strategies, Inc.
Global Innovator of Design-to-Test Software
CORE COMPETENCY:Gate Level Simulation, Enterprise Tools, Interoperability Tools, Debugger, Training and Consulting, Verilog Simulation, VHDL Simulation, Verification, DFT Tools, Intelligent Test Bench
Headquarter: United States
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True Circuits, Inc.
timing is everything
CORE COMPETENCY:Analog Design, Analog Simulation, Design Libraries, Design IP, Timing Design, Mixed Signal Simulation
Headquarter: United States
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Triad Semiconductor, Inc.
Configurable low-cost mixed signal Via-ASIC solutions
CORE COMPETENCY:Analog Design, Analog Simulation, Schematic Capture, Design Libraries, IC SPICE and SPICE-like Simulation, Libraries, Design IP, Design Services, Silicon Virtual Prototype, Verilog Simulation, VHDL Simulation, Mixed Language Simulation, Mixed Signal Simulation, RTL Design and Entry
Headquarter: United States
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Tata Elxsi
Engineering creativity
CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, Schematic Capture, Design Libraries, Interoperability Tools, ASIC Layout, Custom Layout, DRC, EMI Analysis, FPGA/PLD, IC SPICE and SPICE-like Simulation, Library Development Tools, PCB Design, Physical Libraries, Signal - Integrity Analysis, Timing Analysis, Compiler, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Test and Verification, Libraries, RTOS, DSP, Networking, Telecomms, Wireless, Design IP, Verification IP, Design Services, Silicon Virtual Prototype, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Verification, DFT Tools, Formal Verification, HW/SW Co-Verification, Intelligent Test Bench, Mixed Language Simulation, RTL Design and Entry
Headquarter: United States
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Tanner EDA
Speeding Concept to Silicon
CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, ASIC Layout, Custom Layout, DRC, Extractors, IC SPICE and SPICE-like Simulation, Lithography, Mask Design, MEMS, Verification, Mixed Signal Simulation
Headquarter: United States
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Takumi Technology Corp.
CORE COMPETENCY:Design Libraries, Custom Layout, DRC, IC DFM Tools, IC Implementation, Library Development Tools, Lithography, Mask Design, Physical Libraries, RET, T-Cad, Libraries, Design IP, Design Services
Headquarter: United States
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SoftJin Technologies Pvt. Ltd.
Enabling Electronic Design
CORE COMPETENCY:Interoperability Tools, DRC, IC DFM Tools, Mask Design, RET, Design Services, Synthesis
Headquarter: United States
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PDF Solutions
CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Design Libraries, DRC, IC DFM Tools, IC Implementation, Library Development Tools, Design Services, Training and Consulting
Headquarter: United States
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Open iT, Inc.
Open iT creates software for IT resource monitoring and reporting.
CORE COMPETENCY:Enterprise Tools
Headquarter: United States
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Micro Magic, Inc.
Fast Silicon Fast
CORE COMPETENCY:Analog Design, Gate Level Simulation, Gate Level/Transistor Level Design, Design Libraries, ASIC Layout, Custom Layout, Mask Design, DSP, Memory, Networking, Telecomms, Wireless, Design IP, RTL Design and Entry
Headquarter: United States
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Lynguent, Inc.
CORE COMPETENCY:Analog Design, Analog Simulation, Interoperability Tools, Design IP, Verification IP, Mixed Signal Simulation
Headquarter: United States
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Liga Systems, Inc.
CORE COMPETENCY:Acceleration and Emulation, Gate Level Simulation, Interoperability Tools, Design IP, Verification IP, Verilog Simulation, Verification, Acceleration and Emulation, HW/SW Co-Verification
Headquarter: United States
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Library Technologies, Inc.
CORE COMPETENCY:Gate Level Simulation, Gate Level/Transistor Level Design, Design Libraries, Delay Calculation, IC Implementation, Library Development Tools, Physical Libraries, Power Analysis, Timing Analysis, Synthesis, Verilog Simulation, Timing Design, Verification, Power Design, Signal-Integrity Design
Headquarter: United States
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Interoperable PCell Libraries
CORE COMPETENCY:Analog Design, Interoperability Tools, Custom Layout
Headquarter: United States
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IC Manage
Industrial Strength Design Management
CORE COMPETENCY:Analog Design, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, Interoperability Tools, ASIC Layout, Custom Layout, IC Implementation, Library Development Tools, ESL Design and Entry, Design IP, Verification IP, RTL Design and Entry
Headquarter: United States
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FTL Systems, Inc.
CORE COMPETENCY:Acceleration and Emulation, Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Enterprise Tools, Delay Calculation, FPGA/PLD, IC SPICE and SPICE-like Simulation, Power Analysis, Target Compiler, Timing Analysis, Compiler, Debugger, ESL Co-Verification, ESL Logic Synthesis, ESL Simulation, ESL Test and Verification, Silicon Virtual Prototype, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Acceleration and Emulation, EMI Design, Formal Verification, HW/SW Co-Verification, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry
Headquarter: United States
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EMA Design Automation, Inc.
CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, ASIC Layout, Custom Layout, Delay Calculation, DRC, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Library Development Tools, MCM, Hybrid and Packaging Design, PCB CAM, PCB Design, PCB SPICE, Power Analysis, Signal - Integrity Analysis, Thermal Analysis, Timing Analysis, Training and Consulting, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Verification, Formal Analysis, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design
Headquarter: United States
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ClioSoft, Inc.
Empowering Global Collaboration and Design Data Management
CORE COMPETENCY:Analog Design, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, ASIC Layout, Custom Layout, IC Implementation, Library Development Tools, ESL Design and Entry, Design IP, Verification IP, RTL Design and Entry
Headquarter: United States
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ams
CORE COMPETENCY:Design Libraries, ASIC Layout, Custom Layout, Delay Calculation, DRC, Extractors, IC Implementation, IC SPICE and SPICE-like Simulation, Lithography, Mask Design, Physical Libraries, T-Cad, Libraries, DSP, Memory, Design IP
Headquarter: United States
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