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Search for EDA Tools.
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OR EDA Supplier: list your tools for free in this catalog. |
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IP Compilers
CORE COMPETENCY:Compiler, Memory, Synthesis |
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Cadence Design Systems, Inc.
CORE COMPETENCY:Acceleration and Emulation, Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Enterprise Tools, Interoperability Tools, ASIC Layout, Custom Layout, Delay Calculation, DRC, Extractors, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Lithography, Mask Design, MCM, Hybrid and Packaging Design, Metal - Migration Analysis, PCB CAM, PCB Design, PCB SPICE, PCB Virtual Prototype, Physical Libraries, Power Analysis, Process Migration, RET, Reverse Synthesis, Signal - Integrity Analysis, Thermal Analysis, Timing Analysis, Compiler, ESL Co-Verification, ESL Design and Entry, ESL Logic Synthesis, ESL Power Analysis, ESL Simulation, ESL Test and Verification, DSP, Memory, MEMS, Networking, Telecomms, Wireless, Design IP, Verification IP, Design Services, Training and Consulting, Silicon Virtual Prototype, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Verification, Thermal Design, Acceleration and Emulation, DFT Tools, Formal Analysis, Formal Verification, HW/SW Co-Verification, Intelligent Test Bench, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design Headquarter: United States |
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Mentor Graphics Corp.
EDA Technology Leader CORE COMPETENCY:Acceleration and Emulation, Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, Custom Layout, Delay Calculation, DRC, EMI Analysis, Extractors, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Library Development Tools, Lithography, Mask Design, MCM, Hybrid and Packaging Design, PCB CAM, PCB Design, PCB SPICE, PCB Virtual Prototype, Physical Libraries, RET, Signal - Integrity Analysis, Thermal Analysis, Timing Analysis, Compiler, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Logic Synthesis, ESL Simulation, ESL Test and Verification, Libraries, RTOS, DSP, Memory, Networking, Telecomms, Wireless, Design IP, Verification IP, Training and Consulting, Synthesis, Verilog Simulation, VHDL Simulation, Verification, Acceleration and Emulation, DFT Tools, EMI Design, Formal Analysis, Formal Verification, HW/SW Co-Verification, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design Headquarter: United States |
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Synopsys, Inc.
Helping You Design The Chip Inside CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Design Libraries, Interoperability Tools, ASIC Layout, Custom Layout, Delay Calculation, DRC, EMI Analysis, Extractors, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Library Development Tools, Lithography, Mask Design, Physical Libraries, Power Analysis, RET, Signal - Integrity Analysis, T-Cad, Timing Analysis, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Simulation, ESL Test and Verification, Libraries, DSP, Memory, Networking, Telecomms, Wireless, Design IP, Verification IP, IC Foundry, Training and Consulting, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Verification, DFT Tools, EMI Design, Formal Analysis, Formal Verification, HW/SW Co-Verification, Intelligent Test Bench, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design Headquarter: United States |
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EVE
The Fastest Verification CORE COMPETENCY:Acceleration and Emulation, Gate Level Simulation, ESL Co-Verification, ESL Simulation, ESL Test and Verification, Verification, Acceleration and Emulation, HW/SW Co-Verification Headquarter: United States |
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Denali Software, Inc.
The world leader in chip interface design and verification. CORE COMPETENCY:Enterprise Tools, Interoperability Tools, ESL Co-Verification, ESL Design and Entry, ESL Simulation, ESL Test and Verification, Memory, Design IP, Verification IP, Silicon Virtual Prototype, Verilog Simulation, VHDL Simulation, Timing Design, Intelligent Test Bench Headquarter: United States |
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Agnisys Inc.
A project for you a priority for us. CORE COMPETENCY:ESL Design and Entry, ESL Test and Verification Headquarter: USA |
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Raisonance
CORE COMPETENCY:Interoperability Tools, Compiler, Debugger, ESL Simulation, ESL Test and Verification, Libraries, RTOS, Wireless, Design Services Headquarter: France |
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Scarlet Code LTD
Automate the creation of IP-XACT CORE COMPETENCY:Interoperability Tools, ESL Design and Entry, Design IP, Design Services, HW/SW Co-Verification Headquarter: Essex |
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Dyumnin Technologies
CORE COMPETENCY:ESL Design and Entry, Libraries, Design Services Headquarter: India |
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Anasim Corp.
Power integrity aware front-end chip designer CORE COMPETENCY:Schematic Capture, ASIC Layout, Custom Layout, IC SPICE and SPICE-like Simulation, PCB SPICE, ESL Simulation, Design Services, Training and Consulting, Power Design Headquarter: USA |
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Virage Logic Corp.
Accelerating Silicon Success CORE COMPETENCY:Design Libraries, IC DFM Tools, Library Development Tools, Physical Libraries, Compiler, Debugger, Libraries, Memory, Networking, Telecomms, Wireless, Design IP, DFT Tools Headquarter: United States |
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TSSI - Test Systems Strategies, Inc.
Global Innovator of Design-to-Test Software CORE COMPETENCY:Gate Level Simulation, Enterprise Tools, Interoperability Tools, Debugger, Training and Consulting, Verilog Simulation, VHDL Simulation, Verification, DFT Tools, Intelligent Test Bench Headquarter: United States |
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TSMC
Partnership for Innovation CORE COMPETENCY:Compiler, Libraries, Memory, Networking, Telecomms, Wireless, Design IP, Design Services, IC Foundry Headquarter: United States |
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Triad Semiconductor, Inc.
Configurable low-cost mixed signal Via-ASIC solutions CORE COMPETENCY:Analog Design, Analog Simulation, Schematic Capture, Design Libraries, IC SPICE and SPICE-like Simulation, Libraries, Design IP, Design Services, Silicon Virtual Prototype, Verilog Simulation, VHDL Simulation, Mixed Language Simulation, Mixed Signal Simulation, RTL Design and Entry Headquarter: United States |
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Temento Systems
CORE COMPETENCY:Debugger, Verification IP, Training and Consulting, Verification, Acceleration and Emulation, DFT Tools, HW/SW Co-Verification Headquarter: France |
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Tata Elxsi
Engineering creativity CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, Schematic Capture, Design Libraries, Interoperability Tools, ASIC Layout, Custom Layout, DRC, EMI Analysis, FPGA/PLD, IC SPICE and SPICE-like Simulation, Library Development Tools, PCB Design, Physical Libraries, Signal - Integrity Analysis, Timing Analysis, Compiler, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Test and Verification, Libraries, RTOS, DSP, Networking, Telecomms, Wireless, Design IP, Verification IP, Design Services, Silicon Virtual Prototype, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Verification, DFT Tools, Formal Verification, HW/SW Co-Verification, Intelligent Test Bench, Mixed Language Simulation, RTL Design and Entry Headquarter: United States |
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Target Compiler Technologies
EDA tools and services to design, verify and program Application-Specific Instruction-set Processors (ASIPs) CORE COMPETENCY:Target Compiler, Compiler, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Logic Synthesis, ESL Power Analysis, ESL Simulation, ESL Test and Verification, Libraries, Design IP, Verification IP, Design Services, HW/SW Co-Verification, RTL Design and Entry Headquarter: United States |
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Takumi Technology Corp.
CORE COMPETENCY:Design Libraries, Custom Layout, DRC, IC DFM Tools, IC Implementation, Library Development Tools, Lithography, Mask Design, Physical Libraries, RET, T-Cad, Libraries, Design IP, Design Services Headquarter: United States |
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Space Codesign
CORE COMPETENCY:Compiler, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Simulation, ESL Test and Verification, Libraries, RTOS, Temporal Analysis, Design Services, Training and Consulting Headquarter: Canada |
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Mixel, Inc.
CORE COMPETENCY:Analog Design, Analog Simulation, Physical Libraries, Libraries, Design IP, Design Services Headquarter: United States |
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Mirabilis Design Inc.
Performance Analysis and Architecture Exploration CORE COMPETENCY:ESL Co-Verification, ESL Design and Entry, ESL Power Analysis, ESL Simulation, ESL Test and Verification, Libraries, Networking, Telecomms, Wireless, HW/SW Co-Verification, Intelligent Test Bench Headquarter: United States |
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MathWorks, Inc. (The)
CORE COMPETENCY:Gate Level Simulation, RF Design and Simulation, ESL Co-Verification, ESL Design and Entry, ESL Simulation, ESL Test and Verification, DSP, Telecomms, Wireless, Verilog Simulation, VHDL Simulation, Verification, Mixed Language Simulation, Mixed Signal Simulation Headquarter: United States |
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JEDA Technologies
System-Driven Verification Automation CORE COMPETENCY:ESL Co-Verification, ESL Test and Verification, Verification IP, Verification, HW/SW Co-Verification, Intelligent Test Bench Headquarter: United States |
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Javelin Design Automation, Inc.
CORE COMPETENCY:ASIC Layout, IC Implementation, Power Analysis, Timing Analysis, ESL Design and Entry, ESL Power Analysis, DSP, Networking, Telecomms, Wireless, Silicon Virtual Prototype, Timing Design, Power Design, RTL Design and Entry Headquarter: United States |
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Interra Systems, Inc.
CORE COMPETENCY:ASIC Layout, Extractors, IC SPICE and SPICE-like Simulation, Library Development Tools, Power Analysis, Timing Analysis, ESL Co-Verification, ESL Simulation, ESL Test and Verification, Memory, Design Services, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Verification, Acceleration and Emulation, Formal Analysis, Formal Verification, HW/SW Co-Verification, Mixed Language Simulation, RTL Design and Entry Headquarter: United States |
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Intellitech Corp.
The Technology Leader in Scan Based Debug, Configuration and Test CORE COMPETENCY:FPGA/PLD, MCM, Hybrid and Packaging Design, PCB Design, Debugger, ESL Test and Verification, DSP, Memory, Networking, Telecomms, Wireless, Design IP, Verification IP, Design Services, DFT Tools Headquarter: United States |
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Imperas, Inc.
Multicore Design Simplified! CORE COMPETENCY:Compiler, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Power Analysis, ESL Simulation, ESL Test and Verification, Libraries, RTOS, DSP, Memory, Networking, Telecomms, HW/SW Co-Verification, Intelligent Test Bench, RTL Design and Entry Headquarter: United States |
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IC Manage
Industrial Strength Design Management CORE COMPETENCY:Analog Design, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, Interoperability Tools, ASIC Layout, Custom Layout, IC Implementation, Library Development Tools, ESL Design and Entry, Design IP, Verification IP, RTL Design and Entry Headquarter: United States |
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GiDEL
CORE COMPETENCY:Acceleration and Emulation, FPGA/PLD, ESL Co-Verification, Libraries, DSP, Memory, Networking, Telecomms, Wireless, Design Services, Silicon Virtual Prototype, Verification, Acceleration and Emulation, HW/SW Co-Verification, Intelligent Test Bench, Mixed Language Simulation Headquarter: United States |
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