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OR EDA Supplier: list your tools for free in this catalog. |
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Anchor Hill Communications
Engineering Reliable Communication CORE COMPETENCY:DSP, Telecomms, Wireless, Design IP Headquarter: USA | Founded: 2011 |
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Cadence Design Systems, Inc.
CORE COMPETENCY:Acceleration and Emulation, Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Enterprise Tools, Interoperability Tools, ASIC Layout, Custom Layout, Delay Calculation, DRC, Extractors, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Lithography, Mask Design, MCM, Hybrid and Packaging Design, Metal - Migration Analysis, PCB CAM, PCB Design, PCB SPICE, PCB Virtual Prototype, Physical Libraries, Power Analysis, Process Migration, RET, Reverse Synthesis, Signal - Integrity Analysis, Thermal Analysis, Timing Analysis, Compiler, ESL Co-Verification, ESL Design and Entry, ESL Logic Synthesis, ESL Power Analysis, ESL Simulation, ESL Test and Verification, DSP, Memory, MEMS, Networking, Telecomms, Wireless, Design IP, Verification IP, Design Services, Training and Consulting, Silicon Virtual Prototype, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Verification, Thermal Design, Acceleration and Emulation, DFT Tools, Formal Analysis, Formal Verification, HW/SW Co-Verification, Intelligent Test Bench, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design Headquarter: United States | Founded: 1988 | Size: 5200 employees |
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Mentor Graphics Corp.
EDA Technology Leader CORE COMPETENCY:Acceleration and Emulation, Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, Design Libraries, Enterprise Tools, Custom Layout, Delay Calculation, DRC, EMI Analysis, Extractors, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Library Development Tools, Lithography, Mask Design, MCM, Hybrid and Packaging Design, PCB CAM, PCB Design, PCB SPICE, PCB Virtual Prototype, Physical Libraries, RET, Signal - Integrity Analysis, Thermal Analysis, Timing Analysis, Compiler, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Logic Synthesis, ESL Simulation, ESL Test and Verification, Libraries, RTOS, DSP, Memory, Networking, Telecomms, Wireless, Design IP, Verification IP, Training and Consulting, Synthesis, Verilog Simulation, VHDL Simulation, Verification, Acceleration and Emulation, DFT Tools, EMI Design, Formal Analysis, Formal Verification, HW/SW Co-Verification, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design Headquarter: United States | Founded: 1981 | Size: 4200 employees |
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HCL Technologies
CORE COMPETENCY:DSP, Memory, Telecomms, Wireless, Design IP, Design Services, Training and Consulting Headquarter: India |
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Synopsys, Inc.
Helping You Design The Chip Inside CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Design Libraries, Interoperability Tools, ASIC Layout, Custom Layout, Delay Calculation, DRC, EMI Analysis, Extractors, FPGA/PLD, IC DFM Tools, IC Implementation, IC SPICE and SPICE-like Simulation, Library Development Tools, Lithography, Mask Design, Physical Libraries, Power Analysis, RET, Signal - Integrity Analysis, T-Cad, Timing Analysis, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Simulation, ESL Test and Verification, Libraries, DSP, Memory, Networking, Telecomms, Wireless, Design IP, Verification IP, IC Foundry, Training and Consulting, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Verification, DFT Tools, EMI Design, Formal Analysis, Formal Verification, HW/SW Co-Verification, Intelligent Test Bench, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design Headquarter: United States | Founded: 1986 | Size: 5100 employees |
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Credo Semiconductor
CORE COMPETENCY:Analog Design, DSP, Networking, Telecomms, Wireless, Design IP Headquarter: Hong Kong | Founded: 2008 |
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HOTBENCH.NET
Create your VHDL & Verilog testbench fast CORE COMPETENCY:Acceleration and Emulation, Enterprise Tools, DSP, Memory, Networking, Telecomms, Wireless, Verilog Simulation, VHDL Simulation, Verification, Intelligent Test Bench, RTL Design and Entry Headquarter: India |
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Tata Elxsi
Engineering creativity CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, Schematic Capture, Design Libraries, Interoperability Tools, ASIC Layout, Custom Layout, DRC, EMI Analysis, FPGA/PLD, IC SPICE and SPICE-like Simulation, Library Development Tools, PCB Design, Physical Libraries, Signal - Integrity Analysis, Timing Analysis, Compiler, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Test and Verification, Libraries, RTOS, DSP, Networking, Telecomms, Wireless, Design IP, Verification IP, Design Services, Silicon Virtual Prototype, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Verification, DFT Tools, Formal Verification, HW/SW Co-Verification, Intelligent Test Bench, Mixed Language Simulation, RTL Design and Entry Headquarter: United States |
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Silicon Hive
CORE COMPETENCY:DSP, Telecomms, Wireless, Design IP Headquarter: Netherlands |
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QThink
The Proven Path to First Pass Silicon CORE COMPETENCY:Gate Level Simulation, Gate Level/Transistor Level Design, ASIC Layout, Custom Layout, IC Implementation, IC SPICE and SPICE-like Simulation, Mask Design, Power Analysis, Signal - Integrity Analysis, Timing Analysis, DSP, Memory, MEMS, Networking, Telecomms, Wireless, Design Services, Synthesis, Verilog Simulation, VHDL Simulation, Timing Design, Formal Analysis, Formal Verification, Intelligent Test Bench, Mixed Language Simulation, Mixed Signal Simulation, Power Design, RTL Design and Entry, Signal-Integrity Design Headquarter: United States | Founded: 1999 |
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Plurality Ltd.
CORE COMPETENCY:DSP, MEMS, Networking Headquarter: Israel |
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MunEDA GmbH
Design for Yield - Yield is Money! CORE COMPETENCY:Acceleration and Emulation, Analog Design, Analog Simulation, Gate Level Simulation, Gate Level/Transistor Level Design, RF Design and Simulation, Schematic Capture, IC DFM Tools, Power Analysis, DSP, Memory, MEMS, Networking, Telecomms, Wireless, Design IP, Design Services, Training and Consulting, Synthesis Headquarter: Germany |
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Micro Magic, Inc.
Fast Silicon Fast CORE COMPETENCY:Analog Design, Gate Level Simulation, Gate Level/Transistor Level Design, Design Libraries, ASIC Layout, Custom Layout, Mask Design, DSP, Memory, Networking, Telecomms, Wireless, Design IP, RTL Design and Entry Headquarter: United States |
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MathWorks, Inc. (The)
CORE COMPETENCY:Gate Level Simulation, RF Design and Simulation, ESL Co-Verification, ESL Design and Entry, ESL Simulation, ESL Test and Verification, DSP, Telecomms, Wireless, Verilog Simulation, VHDL Simulation, Verification, Mixed Language Simulation, Mixed Signal Simulation Headquarter: United States |
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Javelin Design Automation, Inc.
CORE COMPETENCY:ASIC Layout, IC Implementation, Power Analysis, Timing Analysis, ESL Design and Entry, ESL Power Analysis, DSP, Networking, Telecomms, Wireless, Silicon Virtual Prototype, Timing Design, Power Design, RTL Design and Entry Headquarter: United States |
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Intellitech Corp.
The Technology Leader in Scan Based Debug, Configuration and Test CORE COMPETENCY:FPGA/PLD, MCM, Hybrid and Packaging Design, PCB Design, Debugger, ESL Test and Verification, DSP, Memory, Networking, Telecomms, Wireless, Design IP, Verification IP, Design Services, DFT Tools Headquarter: United States | Founded: 1988 |
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Incentia Design Systems, Inc.
CORE COMPETENCY:Delay Calculation, Power Analysis, Signal - Integrity Analysis, Timing Analysis, DSP, Networking, Telecomms, Wireless, Synthesis, DFT Tools, Power Design, RTL Design and Entry Headquarter: United States |
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Imperas, Inc.
Multicore Design Simplified! CORE COMPETENCY:Compiler, Debugger, ESL Co-Verification, ESL Design and Entry, ESL Power Analysis, ESL Simulation, ESL Test and Verification, Libraries, RTOS, DSP, Memory, Networking, Telecomms, HW/SW Co-Verification, Intelligent Test Bench, RTL Design and Entry Headquarter: United States |
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Gradient Design Automation
CORE COMPETENCY:Analog Design, Analog Simulation, Gate Level/Transistor Level Design, ASIC Layout, Custom Layout, IC SPICE and SPICE-like Simulation, Metal - Migration Analysis, Power Analysis, Thermal Analysis, DSP, Networking, Telecomms, Wireless Headquarter: United States |
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GiDEL
CORE COMPETENCY:Acceleration and Emulation, FPGA/PLD, ESL Co-Verification, Libraries, DSP, Memory, Networking, Telecomms, Wireless, Design Services, Silicon Virtual Prototype, Verification, Acceleration and Emulation, HW/SW Co-Verification, Intelligent Test Bench, Mixed Language Simulation Headquarter: United States |
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Dynalith Systems Co., Ltd.
CORE COMPETENCY:Acceleration and Emulation, Gate Level Simulation, FPGA/PLD, ESL Co-Verification, ESL Simulation, ESL Test and Verification, RTOS, DSP, Networking, Telecomms, Verification IP, Training and Consulting, Silicon Virtual Prototype, Verilog Simulation, VHDL Simulation, Verification, Acceleration and Emulation, HW/SW Co-Verification, RTL Design and Entry Headquarter: South Korea |
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ChipVision Design Systems
CORE COMPETENCY:Power Analysis, ESL Design and Entry, ESL Power Analysis, DSP, Networking, Telecomms, Wireless Headquarter: Germany |
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Calypto Design Systems
Bridging System and RTL CORE COMPETENCY:ASIC Layout, IC Implementation, Power Analysis, Debugger, ESL Test and Verification, Temporal Analysis, DSP, Networking, Telecomms, Wireless, Verification IP, Verification, Formal Verification Headquarter: United States |
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Breker Verification Systems
Predictable Path to 100% Verification Plan Coverage CORE COMPETENCY:DSP, Memory, MEMS, Networking, Telecomms, Wireless, Verification IP, Design Services, Training and Consulting, Verilog Simulation, VHDL Simulation, Verification, Intelligent Test Bench, Mixed Language Simulation Headquarter: United States |
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Axiom Design Automation
Delivering Verification Performance CORE COMPETENCY:Gate Level Simulation, DSP, Design IP, Verification IP, Design Services, Verilog Simulation, Formal Analysis, Formal Verification, Intelligent Test Bench, RTL Design and Entry Headquarter: United States |
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ams
CORE COMPETENCY:Design Libraries, ASIC Layout, Custom Layout, Delay Calculation, DRC, Extractors, IC Implementation, IC SPICE and SPICE-like Simulation, Lithography, Mask Design, Physical Libraries, T-Cad, Libraries, DSP, Memory, Design IP Headquarter: United States |
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ACE Associated Compiler Experts bv
Products and services for professional compiler development CORE COMPETENCY:Compiler, ESL Co-Verification, ESL Design and Entry, ESL Test and Verification, DSP, Networking, Telecomms Headquarter: Netherlands |
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