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M31 Technology, a leading global provider of silicon intellectual property (IP), announced that its 5nm advanced process IP solution for high-speed interface ... Read
Faraday Technology announced it is leveraging the latest Arm® Automotive Enhanced (AE) technology, licensing the Cortex®-A720AE IP to drive the development ... Read
JEDEC Updates JESD79-5C DDR5 SDRAM Standard: Elevating Performance and Security for Next-Gen ...
EDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced publication of ... Read
Partner Highlight
Zhuhai Chuangfeixin: OTP IP Based on 90nm CMOS Image Sensor Process Technology Successfully ...
Zhuhai Chuangfeixin Technology Co., Ltd.,(CFX) a leading one-stop NVM IP provider in China, recently announced that its OTP IP (One-Time Programmable ... Read
Rivos, a RISC-V accelerated platform company targeting data analytics and Generative AI, announced it has raised more than $250M in its oversubscribed ... Read
Movellus today announced the expansion of its award-winning1 droop response solutions with the Aeonic Generate™ AWM3. This pioneering solution responds ... Read
Industry Expert Blogs
arm Blogs Tim Thornton, Arm
Ceva's Experts blog By Tomer Yablonka, Ceva
Cadence Blog Vinod Khera, Cadence
Frontgrade Gaisler Blog Fabio Malatesta
Aeonic Generate™ AWM3
3.3V general purpose I/O for 28nm CMOS
One Time Programmable IP on Samsung 90CIS
112Gbps VSR to extended LR SerDes IP on TSMC N7/N6
112G Ultra-Low Power VSR PHY in TSMC N5 for optical modules ...
Fast Fourier Transform IP Core
ETHOS-U85 NPU
APXM-6200 - 64-bit, highly efficient application RISC-V CPU
Crypto Module IP core
Multi-protocol wireless plaform integrating 802.11ax (Wi-Fi ...
10Base-T/100Base-TX Fast Ethernet PHY
Temperature/Voltage Monitor in GF 22FDX
RISC-V GPGPU for 3D graphics and AI at the edge
BoW Verification IP
USB4 v2.0 Verification IP
Simulation VIP for MIPI SoundWire-I3S
MIPI A-PHY Verification IP
UCIe Verification IP
Synthesizable DDR5 Bus Functional Model
SGPIO Verification IP
MIPI D-PHY Receiver for CSI-2 of TSMC 40nm LP
Industry Articles
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Embracing a More Secure Era with TLS 1.3
Lawrence Liu
PUFsecurity -
New PCIe Gen6 CXL3.0 retimer: a small chip for big next-gen AI
Anton Shilov
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Maximizing ESD protection for automotive Ethernet applications
Andreas Hardock
Nexperia -
The role of cache in AI processor design
Frank Schirrmeister
Arteris -
Time Sensitive Networking for Aerospace
CAST and Fraunhofer IPMS
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Understanding mmWave RADAR, its Principle & Applications
Snehal Buche
eInfochips -
Advanced Topics in FinFET Back-End Layout, Analog Techniques, and Design Tools
AsicNorth
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Maximizing Performance & Reliability for Flash Applications with Synopsys xSPI Solution
Lakshmi Jain
Synopsys
