ASRC-Lite : 16-bit -90dB THD+N Multi-Channel Audio Sample Rate Converter
VESA DSC Decoder
Fractional-N Frequency Synthesizer PLL (10nm - 180nm)
PCI Express IP core with enhanced DMA for Xilinx FPGA
SoftBank/ARM Deal: Political Hurdles Ahead?
CAST Introduces Low-Power, Ultra-HD Capable Video Compression Cores
A cost-effective and highly productive Framework for IP Integration in SoC using pre-defined language sensitive Editors (LSE) templates and effectively using System Verilog Interfaces
Efficient SIMD and Algorithmic Optimization Techniques for H264 Decoder on Cortex A9
Setting up secure VPN connections with cryptography offloaded to your Altera SoC FPGA
Economic Uncertainty, the Global Economy and Semiconductors
Brexit impact on semiconductors
See Demos on USB Type-C & USB 3.1 at Intel Developer Forum 2016
© 2016 Design And Reuse
All Rights Reserved.
No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.
Visit our new Partnership Portal for more information.
your IPs for free.