The logiPD-LDW Development Platform provides users with fundamental building blocks necessary to create two types of vision system applications based on Xilinx Spartan-6 FPGA: the Pedestrian Detection and the Rear Looking Lane Departure Warning Systems. The demos require different system setups so only one demo can be running at a time.
Hardware, fully functional reference FPGA designs and associated software support provide users efficient means to fully assess the performance of logicBRICKS products in their own test platforms and targeted usage conditions, i.e. driving conditions in case of automotive applications. Functions incorporated in the logiPD-LDW development platform can save months of development time.
The logiPD-LDW offers a complete FPGA based engine capable of detecting pedestrians/humans from a camera video image. Its application fields range from video surveillance, driving assistance systems, robot navigation, assistive technology for the visually impaired, content-based indexing, advanced human-machine interfaces, and possibly other applications.The key IP Core: logiPDET Pedestrian Detector
Lane Departure Warning Systems (LDWS) are typically electronic automotive systems that identify and track the markings corresponding to the lane boundaries, locate the vehicle position with respect to them and issue a warning when the vehicle crosses the lane bounds.The key IP Core: logiLMD Lane Marking Detector
Features
- Full Xilinx® Spartan®-6 FPGA based design framework for Pedestrian Detection and Rear Looking Lane Departure Warning
- Preloaded demo applications
- Can be installed in test vehicles
- SW drivers, APIs and post-processing libraries
- Reference FPGA design with evaluation logicBRICKS IP cores
- Calibration software for lens correction and camera perspective corrections
Benefits
- Provides pre-designed interfacing infrastructure and saves months of development. The platform and toolset enable automotive designers to evaluate the quality of the solution, explore new ideas and methodologies, and jump-start their next highly differentiated Surround View DA System design.
- Video processing in a single mid-sized Xilinx Spartan-6 FPGA, without external processors with 3D graphics engines.
Deliverables
- 1x Xilinx FPGA SP605 Evaluation Kit with the Spartan-6 XC6SLX45T-FGG484 device
- 1x Xylon logiFMC-FPD-II 4-Channel FPD-Link II FMC Daughter Card
- 1x DVI I/O FMC daughter card
- 1x Omnivision OV09715 1-megapixel sensor with an active array size of 1200x800
- 1x Largan fish eye (wide FOV) 95321A lens
- 1x National Semiconductor® FPD-Link II serializer boards for camera sensors
- Reference FPGA Designs Evaluation logicBRICKS IP cores
- Applications and Drivers Documentation
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