The first of a planned series of Tech Talk presentations by Intel focused on NVM Express (NVMe) was given to a worldwide web audience by Amber Huffman, senior principal engineer and NVM Express Workgroup chair. The presentation reinforced the message given by the same speaker at IDF13.
NVMe is the standardized high-performance host controller interface for PCI Express-based SSDs with an architecture designed for non-volatile memory scaling from the enterprise to the client. While ready to offer performance gains with the present generation of NV memory SSDs based on NAND, it has also been designed with the next-generation NV memory in mind. Its architecture focuses on latency, parallelism, and performance, and the details have been well documented.
NVMe is now supported by 90+ leading companies and a 30-company promoter group. The first products began shipping in 2014. The driving force for NVMe acceptance is its ability to move NV memory from the legacy of the rotating disc and serial operation to parallel operation. Standardization of the register, feature, and command sets is a means of moving from proprietary to product interoperability.
Flash memory multilevel cell (MLC) NAND provides the primary non-volatile part of the present proof of performance of NVMe-based designs, which is impressive. The appearance of emerging NV memories would appear to hold the key to a dramatic factor of 4x improvement in future performance. However, the saving grace is NVMe has been designed to be memory independent or “agnostic” to the memory technology that eventually wins the NV emerging technology race.
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