Open Forum: Systolic and 2D array
(Dec. 6, 15:30-16:30)
"Systolic FIR Filter IP Based FPGA" by Abdelhamid GOUGAM & Djamel Benazzouz from University of Boumerdes
"An MDE Approach For Implementing Partial Dynamic Reconfiguration In FPGAs" by IMRAN-RAFIQ QUADRI, SAMY MEFTALI & JEAN-LUC DEKEYSER from LIFL, USTL, INRIA FUTURS
"VLSI Based On Two-Dimensional Reconfigurable Array Of Processor Elements And Theirs Implementation Of Numerical Algorithms In Real-Time Systems" by Nick Lookin from Institute of Engineering Science, Vadim Bersenev from Urals Division of RAS & Michael Trapeznikoff from SPAA
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