"Virtual Prototyping Environment for Multi-core SoC Hardware and Software Development"
By Syed Saif Abrar, Aravinda Thimmapuram
NXP Semiconductors, Bangalore, INDIA

Abstract:
The consumer electronic devices are becoming complex and employing multiple processors. Design of hardware and software for such a system presents lots of challenges. Hardware designer needs performance evaluation to select proper architecture. Software developer needs to develop and debug the software for multiple processors. In order to meet the competitive market, all this needs to be done even when the actual hardware is not available. This paper introduces a methodology based on Virtual Prototyping Environment, developed using simulation models of all the components of the target architecture. This methodology helps to fine-tune the hardware architecture as well as develop and debug the embedded-software.

 

Speaker Aravinda T. is a Computer Science graduate, working with SystemC modeling group of NXP Semiconductors, Bangalore (INDIA) for past 3 years. Prior to joining NXP, speaker has worked for TI and Sasken in hardware modeling and EDA tools division. Current responsibility include high-level modeling of cellular systems. Speaker's research interest are distributed simulation and  cycle-accuracy in high-level models.

 

- IP Design Category

Abstract:

A 0.79-mm2 29-mW real-time face detection IP core is fabricated in a 0.13-mm CMOS technology and its performance was evaluated. It consists of 75-kgate logic, 58-kbit SRAM, and an ARM AMBA bus interface. Comprehensive optimization in both algorithm and hardware design improves performance and reduces area and power dissipation. Two kinds of templates with facial features are proposed to achieve high speed and yet accurate face detection. A Steady State Genetic Algorithm is employed for high-speed hardware implementation of template matching. To reduce area and power dissipation, frame memory is optimized at minimum and the detection engine is shared for two kinds of template matching. The IP core can detect 8 faces per frame at 30fps. Face detection accuracy is 92%.

 

Yuya Hanai is currently working toward the B.S. degree in electrical engineering at Keio University, Japan.
His research interest includes software/hardware co-design for human computer interaction.

 

"Generic Driver Model using Hardware Abstraction and Standard APIs"
By Amar Amar, Shirish Joshi & Don Wallwork from Cisco Systems Inc

 

Abstract:

In most cases, device drivers are written with both higher level logic and hardware specific code within the same functions. This means that each time a given physical device is used on multiple boards or platforms, the device driver code has to be re-written specific to the environment in which it is being used.

This paper describes a unique approach for developing drivers using hardware abstraction and standard APIs for hardware and software interfaces. Having standard interfaces encourages design methodology which enables development of common software for controlling and managing physical devices. The operating system and platform specific driver interface software can be separated from device specific software. This promotes sharing and reuse of software IP.  For example, common device driver code can be used across multiple platforms where the same physical device is being used. 

At Cisco Systems, a team of engineers developed such an approach called the Device Object Model and developed software APIs based on hardware abstraction of common functions and interfaces.  This approach simplifies porting, integration and testing of device driver software across different platforms and OS environments.  This model has been used on several Cisco platforms.  The cost of software development and full life cycle support has been significantly reduced (nearly 30%) due to the adoption of this model.

1) Don Wallwork is a technical leader in the software development of Service Router Group at Cisco Systems. He has played a key role in the design of the Device Object Model and has implemented several device drivers using this approach.

 

2) Amar C. Amar is a senior technical leader in the Product Standards group of hardware technology operations at Cisco System. He is program managing several system standard initiatives across Cisco.