"Design of an IP for a G729 voice decoding circuit" by F. Sayadi,E.
Casseau, M. Marzougui, M. Atri, R. Tourki, E. Martin, Laboratoire d'EµE-
Faculté des sciences de Monastir (Tunisie); Laboratoire L.E.S.T.E.R
- Université de Bretagne Sud (Lorien)
"Bluetooth Baseband IP in an ARM9 environment" by Jeff Robertson, Ericsson
Technology Licensing (Sweden)
"Deterministic and Balanced Architecture - VII-Pro" by Antolin Agatep,
Jean-Louis Brelet, Xilinx, Inc. (USA)
Hardware / Software Integration
"Co-simulation and Communication Synthesis for Intellectual Properties
IPs Based SOCs: Approach and Experimentation" by M. Marzougui, M. Abid, R.
Tourki, Electronic and Micro-Electronic aboratory. Monastir (Tunisia); A.
Baganne , LESTER Laboratory. U.B.S (Lorient France)
"Reusable Verification Infrastructure for a Processor Platform
to deliver fast SOC development" by Stephen Brain, Glenn Farrall, Richard
Tuck, Infineon Technologies (UK); Kambiz Khalilian, Infineon Technologies
"Reusability and modularity in SoC Verification environment" by Achutha
Jois, Vishal Dalal, Sasken communication Technologies Ltd. (India)
"IP-Reuse and Platform based designs" by Ramesh Chandra, STMicroelectronics,
"The Configurable VLIW Processor As The Base For A Cost Effective SoC
Platform" by Victor Berman, Improv Systems (USA)
"Platform Based Design - Enabling fast SoC time to Market" by Juergen
Hilsberg, IBM Technology Group (Switzerland)
Development Tools and Platforms
"FPGA to ASIC Strategy for Communication SoC Designs" by Rick Mosher,
AMI Semiconductors (USA)
"An IP-based SOC Design Kit for Rapid Time-to-Market" by Dr Robert
Deaves, Dr Andrew Jones, SuperH (UK)
"DAvE - Software based system evaluation in the pre-silicon phase"
by Timo Bierbaum, Infineon technologies (Germany)
"Object-Oriented Synthesis, Modelling and Partioning for SoC Design"
by M. Winterholer, C. Schulz-Key, T. Kuhn, W. Rosenstiel, University of Tuebingen
Debugging and Test
"Design-for-Test for SoC - Is there a fork in the roadmap?" by Ron
Press, Mentor Graphics (USA); Richard Illman, Cadence Design Foundry (UK)
"An Embedded Processor Architecture with extensive support for SOC
debug" by Richard Curnow, Mark Hill, Andrew Jones, SuperH (UK)
"Behavior Analysis for SoC Debugging" by Scott Sandler, Yu-Chin Hsu,
George Bakewell, Bassam Tabbara, Novas Software (USA)
"Internet-Based Testability-Driven Test Generation in the Virtual Environment
MOSCITO" by Andre Schneider, Karl-Heinz Diener, Günter Elst -
Fraunhofer Institute for Integrated Circuits (Germany); Eero Ivask, Jaan
Raik, Raimund Ubar - Tallinn Technical University (Estonia)
Far East Activities in IP Exchange and IP Based SoC Design
"IP Exchange Activities and IP Needs for Japanese Electronics Market"
by Motoaki Ito, Nobuyuki Miyazaki and Shojiro Mori, IPTC Corporation (Japan)
"Activities of SIPAC in IP/SoC industry of Korea" by Shiho Kim,
"Si-Soft: A national research program for IP/SoC Design Promotion"
by Prof. Chen-Yi Lee, CIC (Taiwan)
"A coherent mixed-signal verification environment based on Matlab"
by Pat Overs, Cambridge Consultants Ltd (UK)
Medea (Toolip) Project Overview
"Tools and Methods for IP" by Ralf Seepold, FZI (Germany)
"Experiences in Formal Checking of a DSP IP Core" by Nguyen H.N., Koumou
P., Bull S.A.,METASymbiose S.A. (France); Candaele B., Sarlotte M., Antoine
C., Emeriau S., Thales Communications (France)
"A next generation interconnect concept to design high performance
SoC's" by Carsten Demuth , Infineon (Germany)
Report on the Activities of the VSIA DWG on Virtual Component Quality
"A Parallel TCP/IP Offloading Framework for a TCP/IP Offloading Implementation"
by Juan M. Solá-Sloan, Isidoro Couvertier, Universidad de Puerto Rico
Mayaguez Campus (Puerto Rico)
"Static RTL Analysis of Multi Clock Domain Designs" by Mark Langer,
Steffen Rülke,Fraunhofer IIS Erlangen/Branch Lab DA, Dresden (Germany);
Alexander Krebs, Frank Dresig,AMD Saxony Limited Liability Company &
Co. KG, Dresden Design Center (Germany)
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