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Invited Talk: High Level Modeling and Verification for IP-Based Systems
Thursday December 3, 2009, 9:30 - 10:15 | Room: Kilimandjaro
By Kathryn Kranen, President and CEO
Jasper Design Automation

High Level Modeling and Verification for IP-Based Systems mandates a multi-level approach.

· IP development and quality review.

· IP deployment, modification and verification.

· Hierarchical verification with multi-level modeling for verification from architectural level through RTL through layout.

This approach can help disaggregate tasks functionally, parallelize the design / verification challenge and bridge the gap between design and verification.

Biography:

Kathryn Kranen is responsible for leading Jasper’s team in successfully bringing the company’s pioneering technology to the mainstream design verification market. She has 20 years EDA industry experience and a proven management track record. While serving as president and CEO of Verisity Design, Inc., US headquarters of Verisity Ltd., Kathryn and the team she built created an entirely new market in design verification. (Verisity later became a public company, and was the top-performing IPO of 2001.) Prior to Verisity, Kathryn was vice president of North American sales at Quickturn Systems. She started her career as a design engineer at Rockwell International, and later joined Daisy Systems, an early EDA company.