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Keynote Talk: Prototyping Using IP at Multiple Abstraction Levels Enables Embedded Software Development
Wednesday December 2, 2009, 9:45 - 10:30 | Room: Auditorium
By Joachim Kunkel, Vice President and General Manager, Solutions Group
Synopsys

Recent surveys* confirm that an increasing portion of the chip development effort is spent on embedded software development. As a result, prototyping techniques have emerged at several levels of abstraction, enabling embedded software development to commence far ahead of prototype silicon and to increase productivity of hardware/software debug. With re-use for hardware development approaching the 50% mark, availability of processor, on-chip bus, digital and mixed-signal connectivity IP at several levels of abstractions shortens the time to availability of system prototyping platforms. Virtual platforms are enabled by IP at the transaction-level, while FPGA prototypes utilize IP at the register transfer level (RTL). Together they enable system prototypes for pre-silicon software development and verification.
This keynote will review advanced technologies and trends of IP re-use and system prototyping for embedded software development and verification. It will chart a course of the key trends towards next generation digital and mixed signal IP development and verification.

* 2008 SNUGs, 2009 DVCon

Biography:

Joachim Kunkel joined Synopsys in 1994 and is currently vice president and general manager of the Solutions Group. In that capacity, he manages the business units responsible for Synopsys DesignWare® intellectual property (IP), strategic market development and system-level design. Before coming to Synopsys, Mr. Kunkel was co-founder of CADIS GmbH in Aachen, Germany. There, he served as managing director and performed myriad duties in engineering, sales and marketing. Before co-founding CADIS, Mr. Kunkel was a research assistant at the Aachen University of Technology, where he conducted research in system-level simulation techniques for digital signal processing, with special emphasis on parallel computing. Mr. Kunkel holds an MSEE degree, the Dipl.-Ing. der Nachrichtentechnik, from the Aachen University of Technology.