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" IP Based Architecture" Session

• "An Implementation Study on Fault Tolerant LEON-3 Processor System" by Zoran Stamenkovic, Christoph Wolf & Gunter Schoof from IHP GmbH & Jiri Gaisler from Gaisler Research
  
  
• "A Multiprocessor System-on-chip Architecture with Enhanced Compiler Support and Efficient Interconnect" by Mohammad Urfianto, Tsuyoshi Isshiki, Arif Khan, Dongju Li & Hiroaki Kunieda from Tokyo Institute of Technology
  
  
• "DFCI: An Efficient Scalable System-on-chip Communication Architecture" by Nan Wang & Magdy A. Bayoumi from University of Louisiana at Lafayette
  
  
• "RAID6 accelerator in a PowerPC IOP SOC" by Gerard BOUDON, Haluk Aytac & John Fakiris from AMCC
  
  
• "High-resolution CMOS Rotary Encoder SoC Using Magnetic Sensor Array and Statistical Angle Calculation Circuit" by Kazuhiro Nakano & Shoji Kawahito from Shizuoka Univ. & Toru Takahashi & Yoshitaka Nagano from NTN Corp.