Compact clock-generation PLL with 1.0GHz VCO for system and interface clocking applications.
-
Search IP
- Categories
- Featured Products
-
News
- Categories
-
Latest News
Synopsys Posts Financial Results for Second Quarter Fiscal Year 2013
Thursday May. 23, 2013Avery Design Systems Announces eMMC and SD Verification IP Solutions
Wednesday May. 22, 2013
-
Industry Articles
- Categories
-
Featured Articles
- Monday May. 20, 2013
Automated ECO Flow for overall cycle time reduction
Monday May. 13, 2013SoC Interconnect Verification Challenge
Monday May. 06, 2013
-
Blogs
-
Industry Expert Blogs
Build or Buy? The Design Rules Remain the Same
Planet Analog - Vincent BiancomanoReuse ROI Proof Point, USB 3.0 SSIC across MIPI M-PHY with a slice of HAM
Breaking the Three Laws - Michael PosnerCortex-M0+ a year after: smaller, thriftier and smarter!
ARM Blogs - Thomas Ensergueix, CPU Product Manager, ARM
-
Industry Expert Blogs
- Videos
-
IP-SoC Events
- IP-SOC Days IP-SOC 2013 Archives











Mark is General Manager and Founder of Jiatao Industrial Co., Ltd. Located in Shanghai, in which their EDA team focusing on provide IP solutions and EDA tools to its customers in the region. Mark has more than 13 years working experience in IT and business consulting field. For the past two years, he was dedicated on marketing and promoting of high performance analogue and mixed signal IP products in great China region. Prior to the establishment of Jiatao, Mark worked for Swiss consulting firm CH-ina (Shanghai) Co., Ltd. as business consultant and project manager. There his main responsibility is to establish new business operations in China for Swiss and European customers. From year 1996 to year 2004 Mark worked as system analyst and project manager for Cyber Data Processing (CDP) Shenzhen, China. 

