IP-SOC 2012 Conference & Exhibition - IP Based Electronic System


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About this Event...

IP - SoC 2012 will be the 21th edition of the working conference on hot topics in the design world, focusing for the past 10 years on IP-based SoC design and held in the renowned Silicon Valley of the French Alps.

EETimes This event is the only worldwide event fully dedicated to IP (Intellectual Property) in electronic systems. The satisfaction level of the attendees is impressive due to well focused, high level panels, sessions and seminars. Over the year IPs have become Subsystems or Platforms and thus as a natural applicative extension IP-SoC will definitively include a strong Embedded Systems track addressing a continuous technical spectrum from IP to SoC to Embedded System.

Areas of interest:

IP Best practice
• Business models
• IP Exchange, reuse practice and design for reuse
• IP standards & reuse
• Collaborative IP based design

Design
• DFM and process variability in IP design
• IP / SoC physical implementation
• IP design and IP packaging for Integration

Quality and verification
• IP / SoC verification and prototyping
• IP / SoC quality assurance

Architecture and System
• IP based platform
• FPGA SoC
• IP / SOC transaction level modelling
• HW/SW integration
• System-level Prototyping & virtual prototyping
• Multi processor and Network on Chip

Embedded Software
• IP based platfrom
• Middelware
• O.S

Reliability, Real-Time and Fault Tolerant Systems
• IP reliability computation
• Security IP
• Real-time or Embedded Computing Platforms
• Real-time Operating system

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IP-SoC 2012 Best Prizes

CEA_leti Each year, the IP/SoC Conference is proud to recognize the excellent, novel, innovative and highly practical design ideas that authors contribute. Excellence in design - whether it be within an IP block or a complete system continue to be the future of the IP/SoC industry.

Conference

Program Highlights

• Keynote Talks

-	"IP Business: Status and Perspectives" by Gabriele Saucier, CEO, Design And Reuse
-	"Managing the IP Sourcing Process: an IDM Perspective" by Philippe Quinio, Group Vice President of IP Sourcing & Strategy, STMicroelectronics
-	"Cloud and Mobility: Disrupting the IP Ecosystem" by Martin Lund, Senior Vice President, Research and Development, SoC Realization Group, Cadence
-	"20nm Analog/Mixed-Signal IP: Business As Usual?" by Joachim Kunkel, Senior Vice President and General Manager, Solutions Group, Synopsys
-	"Power is now a Software Issue" by Colin Walls, Mentor Graphics

• Invited Talks

-	"Duopoly, Monopoly leading to Opportunity" by Marc Miller, Sr. Director of Marketing, Tabula
-	"µfluidic applications: an upcoming Eldorado for µelectronic ?" by Dr Christine Peponnet, Head of Bio System on Chip Group, CEA Leti

• Panels

-	"Platform & Subsystem IP: Trends and Realities" organized by Hal Barbour (CAST) with the participation of Bill Finch (CAST), Jack Browne (Sonics), Eric Esteve (IP Nest), Peter Hirt (STMicroelectronics), Martin Lund (Cadence)
-	"IP in the cloud" organized by Omri Raisman with the participation of Omri Raisman (Rosetta IP), Steven J. Dovich (Cadence), Marc Miller (Tabula), Marcello Coppola (STMicroelectronics)

• Seminars

-	"Programming the ZYNQ All Programmable SoC" with the participation of Uwe Gertheinrich (Xilinx)
-	"A Formal Approach to Low Power Verification" with the participation of Barbara Jobstmann (Jasper Design Automation), Frédéric Rocheteau (STMicrolectronics)
-	"Faster and safer design for integration of power-optimized SoCs" with the participation of Sebastien Genevey (Dolphin Integration), Lucille Engels (Dolphin Integration)
-	"Parallel Computing" organized by Huy-Nam Nguyen (BULL) with the participation of Gert Goossens (Target Compiler Technologies), Franck Wajsburt (UPMC/Lip6), Huy-Nam Nguyen (BULL)
-	"Challenges and solutions in IP management" organized by Gabriele Saucier (Design And Reuse)

• Technical sessions

-	Session 1: IP Design
-	Session 2: IP & Architecture Design
-	Session 3: IP Quality and reliability
-	Session 4: Hot Topics in SoC design
-	Session 4b: Hot Topics in SoC design
-	Session 5: Challenges in IP Design methodology
-	Session 6: FPGA SOC
-	Session 8: Verification
-	Session 9: Verification

Important Dates

• Deadline for submission of paper summary: September 22, 2012
• Notification of acceptance: October 13, 2012
• Final version of the manuscript: November 3, 2012
• Working conference: December 4-5, 2012

Exhibition

In addition to the IP-SOC 2012 working conference, the attached exhibition gives you the opportunity to see the reality of an Embedded System connected world. The exhibition will allow you to meet the most advanced suppliers and see the latest products.

Why should you exhibit?

IP-SOC 2012 provides a turnkey solution to companies wishing to gain face-to-face contact with key players in the IP arena. The table top exhibition involves a low outlay in terms of financial cost, time out of office and organisational responsibilities, and gives a high yield in terms of high quality sales leads and company promotion. IP-SOC 2012 is a simple way of increasing the products and services you sell and getting your name in front of a highly technical, decision making audience.

Exhibitors, book your space now.

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