D&R IP-SoC Days - Santa Clara
D&R IP-SoC Days Santa Clara was held on March 23-24, 2010 in Santa Clara, CA.
This event is the first of a series of events hosted by D&R in 2010.
Agenda
Day 1: March 23, 2010
| Time |
Agenda
|
8:00 a.m.
|
REGISTRATION
|
| 8:45 a.m. |
INTRODUCTION
"An IP-SoC Community: What for ?"
12 years of experience and presentation of the IP-SoC Tour around the
world
Gabrièle Saucier, CEO, Design & Reuse
SESSION 1 -- IPS AND PARTNERING: THE WINNER DESIGN TRACK
|
9:15 a.m.
|
"Designing with IP in the 21st century - Think Total!"
Ram Gopalan, Sr. Director, Corporate Marketing, Arasan Chip Systems
|
| 10:00 a.m. |
Break
|
| 10:15 a.m. |
"Leveraging Your IP in the New Economy"
Jack Browne, Sr. VP of Sales and Marketing, Sonics, Inc.
|
| 11:00 a.m. |
"Is Partnering the Best Path for Graphics and Display Technology
Differentiation?"
Wei-Jin Dai, President and Chief Executive Officer,Vivante Corp
|
| 11:45 a.m. |
"Smart IP for Product Differentiation"
Simon Lau, President and CEO, Eureka Technology
|
| 12:00 p.m. |
Break
|
| 1:00 p.m. |
PANEL DISCUSSION
"Role of Software and Systems Tools in IP Integration"
Moderator: Ram Gopalan Sr. Director, Corporate Marketing, Arasan Chip Systems
Panelists: Atul Garg (Arasan Chip Systems), Kumar Venkatramani (Silicon Ideas), Phil Casini (ATMarketing), Sriraman Chari (Beecem), Jack Browne (Sonics)
SESSION 2: IPS AND SEMICONDUCTOR INDUSTRY
|
| 2:00 p.m. |
"Industry Trends in Semiconductor IP"
Navraj Nandra, Synopsys
|
| 2:30 p.m. |
"The Semiconductor Industry: getting the toothpaste back in the tube!"
Michael Kaskowitz,
Managing Director, Infinitedge
|
| 3:00 p.m. |
Break
|
| 3:15 p.m. |
"The Foundries View"
Ching-Cheng Chai, TSMC
SESSION 3 - THIRD PARTY IPS
|
| 3:45 p.m. |
"Due Diligence and License negotiation of Third Party IPs
"
Kurt Wolf, Founder and President, Silicon-IP, Inc.
|
| 4:15 p.m. |
Break
|
| 4:30 p.m. |
PANEL DISCUSSION
"External IPs: Benefits, Challenges and
Issues"
With the Participation of Toshiba, Vivante, Synopsys, Infinitedge, Symwave
|
| 5:30 p.m. |
"A platform for Improving External IPs
management"
Gabrièle Saucier, CEO Design & Reuse
|
| 6:00 p.m. |
End
|
Day 2: March 24, 2010
| Time |
Agenda
|
| 9:00 a.m. |
"The Good, the Bad and the Ugly' Factors in Selecting Memory IPs"
Farzad Zarrinfar,
President & CEO,
Novelics Corporation
|
| 9:15 a.m. |
"Give Away IP to Maximize Profits?!"
Reid Wender,
VP Marketing & Technical Sales,
Triad Semiconductor
|
| 9:30 a.m. |
"The role of Networking IP in Wired/Wireless Applications"
Chakra Parvathaneni, V.P. Marketing, Posedge Inc.
|
| 10:10 a.m. |
Break
|
| 10:20 a.m. |
"Verification IPs for the 3rd Wave of Standards"
Atul Bhatia, CEO, nSys Design Systems
|
| 11:00 a.m. |
Break
|
| 11:15 a.m. |
"Design Challenges & Trends for High Speed
Interconnect IPs"
Madhu C. Reddy,
Director of WW IP Business Development/Marketing,
GDA Technologies/Larsen & Toubro InfoTech
|
| 11:45 a.m. |
PANEL DISCUSSION
"Designing SOC with Super Speed USB3.0
- Host, Device & Hub IPs"
Moderator: Ravi Thummarukudy, VP & GM, IC/IP Business Unit,
GDA Technologies Inc.
Panelists:
Amit Saxena (GDA Technologies),
Chris Browy, (Avery Design Systems),
Mike Engbretson (Granite River LABS)
|
| 1:00 p.m. |
Break
|
| 1:30 p.m. |
"OCP-IP: A Standard update"
Ian R. Mackintosh, OCP-IP
|
| 2:00 p.m. |
IP Consumer Feedbacks
How should IP SoC days be organized ?
Wishes and Expectation of IP consumers
|
| 2:30 p.m. |
D&R community meeting
D&R community meetings will take place at any IP SoC Tour event.
This will help D&R to meet the providers worldwide ,get their feedbacks and their wishes for improving the efficiency of D&R networking
Agenda
- Report on D&R partner community
- D&R website activity
- Lead and lead filtering
- Consumer Company targeted by D&R
- IP-SOC Tour
-
How to improve the dating process
- Planning and expectation
|
| 4:00 p.m. |
End
|
Date, Location and Time
Date: March 23-24, 2010
Hilton Santa Clara
4949 Great America Parkway
Santa Clara, CA95054
|
|
