SAN JOSE -- Moving to accelerate its system-on-a-chip strategy, Xilinx Inc. here late Monday evening teamed up with five companies to launch a major initiative that could redefine the booming market for field programmable gate arrays (FPGAs).
The so-called "Platform FPGA" initiative is led by San Jose-based Xilinx and consists of chip maker IBM Corp. as well as software suppliers Mentor Graphics Corp., Synopsys Inc., Wind River Systems Inc., and the MathWorks Inc. The Platform FPGA initiative builds on a previously announced partnership between IBM Microelectronics and Xilinx, which plan to put PowerPC processor cores on a next-generation programmable chip series. IBM will also provide copper-chip processes as a silicon foundry (see July 25 story).
Under the new initiative Xilinx is attempting to garner additional support for its next-generation FPGAs, called Virtex-II. The new s eries is expected to become available in 2001 and will fabricated with 0.10-micron technology for up to 10 million system gates on a chip (see May 22 story). As part of the new Platform FPGA initiative, Xilinx said it will develop systems-level chip products that combine Virtex-II FPGAs with hardware blocks, intellectual-property (IP) cores, and software elements from various third-party vendors.
Among the hardware blocks to be combined with Virtex-II programmable logic will be the PowerPC RISC processor core from IBM, a separate digital signal processor (DSP) core, and a high-speed serial bus IC.
The new chips will move beyond traditional FPGAs, said Willem Roelandts, president and chief executive officer of Xilinx. "What we are introducing is a third-generation FPGA," said Roelandts during a Monday evening press event to announce the initiative. "We're calling it an FPGA platform," he added.
Like the company's current line of FPGA s, the new chips are aimed at replacing ASICs, said the CEO. "FPGAs do not have the densities of ASICs," he noted. "But on the other side, when you go to deep sub-micron designs, it's difficult to design [chips with ASICs]."
In fact, FPGA and ASIC vendors are headed on a major collision. "It's too early to tell which architecture will win in the market," said analyst Bryan Lewis of San Jose-based Dataquest Inc. "PLD vendors are migrating towards a platform strategy. At the same time, the ASIC vendors are also moving towards reference platforms, which are targeted for certain applications," he said.
Meanwhile, in an interview with SBN after the press event, Roelandts said the company would introduce the first in a family of chips based on this FPGA platform within the next two months. "We are not introducing our products yet," he said. "The products will be introduced over the next 12 months."
Key markets for the new chips include the communications, computing, and industrial sectors. "Four years ago, when I came to Xilinx, about 50% of our business was in communications," he said. "Last year, 78% of our chips went into the communications market."
Xilinx will roll out several products built around its Virtex-II chip line, including Empower!, XtremeDSP, and SystemIO. The company will announce more specifications and product prices in the future.
Geared for the communications and consumer markets, Empower! is a chip that combines the Virtex-II FPGA line and the embedded PowerPC 405, a RISC processor core from IBM Microelectronics. Operating at 300-MHz, the PowerPC 405 core has an overall bandwidth of 6-gigabytes-per-second, with an performance of 420 million of instructions per second.
Designed for high-end DSP applications, XtremeDSP is a device that combines an FPGA and DSP core, which supports over 600 billion multiply accumulate cycles per second-more than 100 times faster than competitive products on the market. Meanwhile, SystemIO is a combination FPGA/serial-based device for c ommunications-equipment and related applications.