MIPS Technologies Announces Transition for CFO, Kevin C. Eichler
MOUNTAIN VIEW, Calif., November 4, 2005 - MIPS Technologies, Inc. (NASDAQ: MIPS), a leading provider of industry-standard processor architectures and cores for digital consumer and business applications, today announced the planned departure of Kevin C. "Casey" Eichler, Chief Financial Officer. Mr. Eichler joined MIPS Technologies in May of 1998. Mr. Eichler will remain in his current role until the middle of first quarter calendar year 2006 working with John Bourgoin, President and CEO and the company's executive team to ensure a smooth transition.
"Casey has made key contributions to MIPS Technologies in his lengthy tenure, and I have valued his advice and counsel," said John Bourgoin, President and CEO. "All of us at MIPS Technologies wish him well in the next phase of his career. Casey will be working with me during this period to transition to new leadership."
"I will have been at MIPS Technologies for nearly 8 years and I've enjoyed the opportunity to participate in helping establish MIPS Technologies as a key IP provider in some of the fastest growing embedded markets," said Casey Eichler, Chief Financial Officer of MIPS Technologies. "I look forward to continuing to work with John and the team over the next few months and then watching the company's growth and success in the future."
About MIPS Technologies
MIPS Technologies, Inc. is a leading provider of industry-standard processor architectures and cores for digital consumer and business applications. The company drives the broadest architectural alliance that is delivering 32- and 64-bit embedded RISC solutions. The company licenses its intellectual property to semiconductor companies, ASIC developers and system OEMs. MIPS Technologies and its licensees offer the widest range of robust, scalable processors in standard, custom, semi-custom and application-specific products. The company is based in Mountain View, Calif., and can be reached at +1 (650) 567-5000 or www.mips.com.
|
Related News
Breaking News
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
- TASKING and Andes Announce FuSa Compliant Compiler Support for Andes RISC-V ASIL Compliant Automotive IP
- Efabless Launches an "AI Wake Up Call" Open-Source Silicon Design Challenge
- Efinix Rolls Out Line of FPGAs to Accelerate and Adapt Automotive Designs and Applications
Most Popular
- Qualitas Semiconductor and Ambarella Sign Licensing Agreement
- ZeroPoint Technologies Signs Global Customer to Bring Hardware-Accelerated Compression to Hyperscale Data Centers
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
- Intel and Arm Team Up to Power Startups
- Alphawave Semi and InnoLight Collaborate to Demonstrate Low Latency Linear Pluggable Optics with PCIe 6.0® Subsystem Solution for High-Performance AI Infrastructure at OFC 2024
E-mail This Article | Printer-Friendly Page |