H.264 High Profiles Encoder - High 10, High 4:2:2 and High 4:4:4 (12 bit 4:2:2 or 4:2:0) Profiles
VxTel voice signal processor targets carrier-class switches
VxTel voice signal processor targets carrier-class switches
By Patrick Mannion, EE Times
September 7, 2000 (11:30 a.m. EST)
URL: http://www.eetimes.com/story/OEG20000907S0027
MANHASSET, N.Y. To meet the signal-processing challenges of advanced voice-compression algorithms, VxTel Inc. has unveiled a fully programmable voice signal processor for carrier-class superswitches in next-generation networks. Using proprietary DSP technology, each VX-SP1000 device can process up to 240 uncompressed G.711 channels or 120 compressed G.729A channels, with each channel including 64-millisecond tail-length echo cancellation. Other key telephony features include comfort-noise generation, voice-activity detection, and tone detection and generation. The voice-processing density allowed by the chip will help switch makers meet a central office's strict requirements for power consumption by doubling channel density and halving the power per channel, and its footprint requirements, where 19-inch racks dictate the size of the equipment and board, the company said. VxTel said it will soon unleash a voice packet processor to round o ut its position. "Our goal is to enable the highest-channel-density voice-over-packet systems supporting a full range of voice-processing applications," said Vijay Parmar, vice president of marketing at VxTel. "We are well aware of the problems the Internet Protocol-based central office faces with densities in the hundreds of thousands, while supporting the full range of voice, fax and data-processing options." All this must be done, he said, while still providing toll-grade voice quality. The algorithm processor itself is based on a 166-MHz processing core that operates off 1.8 volts, with I/O running off 3.3 V. Estimated power dissipation is 2.5 watts. Optimized, toll-grade voice-processing firmware supports industry-standard voice codecs such as G.711, G.729A, G.723.1, G.726 and fax. Using G.729A encoding, the power dissipation per channel is 19 mW with a 64-ms echo tail. Jitter buffering is also included. The VX-SP1000 Messaging Protocol (VSMP) layer enables programming and communicati ons, typically across the 64-bit-wide VX-Bus. VSMP makes the board's voice subsystem independent of a host processor, and eliminates the need to produce application-specific code. There are no API or object libraries to link with, just a series of messages to and from the VX-SP1000. Each voice, fax or data channel is independently configurable through VSMP, allowing for easy upgrades. The VX-SP1000 will sample in the fourth quarter in a 17 x 17-mm, 256-ball plastic BGA. Pricing is $650 each per 1,000.
Related News
- Hisense Selects Synaptics' DBM10L Processor For First AI-Enabled Always-On Voice Remote Control
- Arm introduces new image signal processor to advance vision systems for IoT and embedded markets
- VeriSilicon Image Signal Processor IP Achieved IEC 61508 Industrial Functional Safety Certification
- Arm introduces new automotive image signal processor to advance adoption of driver assistance and automation technologies
- VeriSilicon Image Signal Processor IP Achieved ISO 26262 Automotive Functional Safety Certification
Breaking News
- China's Intel, AMD Ban Helps Local Rivals, Analysts Say
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- SEMIFIVE Starts Mass Production of its 14nm AI Inference SoC Platform based Product
- VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
- TASKING and Andes Announce FuSa Compliant Compiler Support for Andes RISC-V ASIL Compliant Automotive IP
Most Popular
- Intel and Arm Team Up to Power Startups
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- Renesas Introduces Industry's First General-Purpose 32-bit RISC-V MCUs with Internally Developed CPU Core
- SmartSoC Solutions Joins TSMC Design Center Alliance to Boost Semiconductor Innovation in India
E-mail This Article | Printer-Friendly Page |