Xilinx bolsters IP arsenal; InSilicon, MIPS hook up
Xilinx bolsters IP arsenal; InSilicon, MIPS hook up
By Michael Santarini, EE Times
August 7, 2000 (12:55 p.m. EST)
URL: http://www.eetimes.com/story/OEG20000807S0018
Xilinx has announced the availability of 29 new cores for use with Xilinx Foundation and Alliance 3.1 software development tools.
The cores support Xilinx's new Virtex-II architecture and are claimed to be scalable to any FPGA density without performance degradation. The release also supports Spartan-II FPGAs.
Four groups of cores are being unveiled: DSPs; storage elements and memories; math functions; and basic elements.
The DSP group includes high-performance cores such as a parameterized finite impulse response filter generator and fast Fourier transforms.
The company claims the DSP cores let designers implement high-performance signal-processing systems that operate at up to 0.6 trillion multiply-and-accumulates (Terra MACs) per second in Virtex-II architecture, the level of performance necessary for emerging applications such as third-generation (3G) and 4G wireless basestations.
The storage elements and memories group includes cores such as parameterized asynchronous FIFOs and single dual-port on-chip memories-key building blocks in many system-level designs.
The cores are available to licensed Xilinx users at no cost.They can be downloaded now from the Xilinx IP (intellectual property) center at www.xilinx.com/ipcenter.
---
InSilicon Corp. and MIPS Technologies Inc. have announced an agreement that allows for the inclusion of MIPS Technologies' embedded processor cores in platform design solutions from InSilicon.
According to the companies, under the agreement, InSilicon may license to its customers cores from MIPS Technologies' MIPS32 4K RISC core processor family.
InSilicon said it intends to develop application-specific vertical market IP that gives the customer a fuller platform solution. Visit www.insilicon.com for more information.
---
Wireless multimedia software and services provider PacketVideo Corp. (San Diego) and microprocessor core vendor ARM (Cambridge, England) have announced that ARM will optimize PacketVideo's wireless video decoder software for the ARM architecture.
According to the companies, the software, which will run on all ARM microprocessor cores, will help accelerate the deployment of wireless multimedia services and applications worldwide.
PacketVideo has developed standards-compliant MPEG-4 software that enables the encoding, decoding and transmission of full-motion video over wireless networks to mobile devices.
The companies said they are collaborating to provide systems and semiconductor manufacturers with a solution that will scale to accommodate a range of wireless environments, without the need for additional hardware acceleration. Visit www.packetvideo.com or www.arm.com.
Related News
- Xilinx Sales Grow For 7th Consecutive Quarter; Advanced Product Sales Up 33% Year-Over-Year
- Xilinx Sales Up 10% Sequentially; Quarterly Dividend Increased $0.02 Per Share
- MIPS Technologies and msystems Team Up on Security; New Safe-SOC Security Platform Developed for STB, DTV, Consumer Electronics, Networking and Mobile Markets
- Cypress plays PCI cores; NurLogic, IBM hook up
- Xilinx gains Insight to create UDP core; MIPS, Tality in SoC linkup
Breaking News
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
- TASKING and Andes Announce FuSa Compliant Compiler Support for Andes RISC-V ASIL Compliant Automotive IP
- Efabless Launches an "AI Wake Up Call" Open-Source Silicon Design Challenge
- Efinix Rolls Out Line of FPGAs to Accelerate and Adapt Automotive Designs and Applications
Most Popular
- Qualitas Semiconductor and Ambarella Sign Licensing Agreement
- ZeroPoint Technologies Signs Global Customer to Bring Hardware-Accelerated Compression to Hyperscale Data Centers
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
- Intel and Arm Team Up to Power Startups
- Alphawave Semi and InnoLight Collaborate to Demonstrate Low Latency Linear Pluggable Optics with PCIe 6.0® Subsystem Solution for High-Performance AI Infrastructure at OFC 2024
E-mail This Article | Printer-Friendly Page |