Bluespec Joins Synopsys In-Sync Program; Program Participation Enables Bluespec to Verify Interoperability with Synopsys Design Compiler

WALTHAM, Mass.--Aug. 15, 2006--Bluespec Inc., developer of the only ESL synthesis toolset for control logic and complex datapaths in chip design, today announced that it has joined the Synopsys(R) in-Sync(R) program to improve the design flow between Bluespec and Synopsys tools.

The in-Sync program membership enables Bluespec to develop a smooth interoperable path between ESL Synthesis software and Synopsys' Design Compiler(R) synthesis solution. Bluespec's ESL synthesis software creates a new level of abstraction for ASIC and FPGA engineers to control the growing design complexities for large-scale digital systems designs. It enables high-level hardware synthesis with Quality of Results (QoR) that can match hand-coded Register Transfer Level (RTL), accelerating the time to a verified netlist and reducing verification efforts.

"For years, Synopsys has initiated programs of its own and worked with standards bodies and industry organizations to advance tool interoperability for customers," said Karen Bartleson, director of interoperability at Synopsys, Inc. "Bluespec's membership in Synopsys' in-Sync program helps us continue carrying the interoperability torch with support from companies throughout the electronic design automation industry."

"Integrating our tools with Synopsys' tools is a win for designers who need to improve productivity while accelerating a product's market introduction," added Sathyam Pattanam, vice president of engineering at Bluespec. "We look forward to a mutually beneficial relationship."

About Bluespec

Bluespec Inc. manufactures industry standards-based Electronic Design Automation (EDA) toolsets that significantly raise the level of abstraction for hardware design while retaining the ability to automatically synthesize high-quality RTL, without compromising speed, power or area. The toolsets, including the only ESL synthesis tools focused on control and complex datapaths, allow ASIC and FPGA designers to reduce design time, bugs and re-spins that contribute to product delays and escalating costs. More information can be found on www.bluespec.com or by calling (781) 250-2200.