Lexra makes processor simulator available free-of-charge

LEXRA MAKES PROCESSOR SIMULATOR AVAILABLE FREE-OF-CHARGE

Lexra announced today that it is making its instruction-accurate Instruction Set Simulator (ISS) for its high performance DSP processor, the LX5280, available free-of-charge for customer evaluation on Lexra's Web site. Now, designers can evaluate their algorithms for free using Lexra's ISS to determine the ease of programming the 5280 and whether Lexra's DSP engine is
appropriate to their application.

One of the most significant challenges for System-on-Chip (SOC) designers is that there was not an easy way to evaluate their software code on a processor IP core to evaluate its functionality for their application. The buyer had to contact the seller, initiate a non-disclosure legal agreement, and wait for a CD to arrive from the seller. This could take up to four weeks out of a design cycle, time more effectively used in evaluation. With Lexra's ISS, the buyer can perform this evaluation almost immediately, thus
shortening the typically long process of core evaluation.

"IP vendors have a great fear of losing control of their cores if they provide free-of-charge, downloadable models on the Web," said Charlie Cheng, president and CEO of Lexra. "This paranoia is stifling the widespread acceptance of reusable third-party cores. By making our tools and cores accessible to anyone wanting to quickly evaluate them, Lexra is helping our
customers shorten their time-to-market."

What the package includes:

The downloadable package includes the instruction-accurate ISS for software code development and debug, a well-commented FIR filter with a C code outer loop and optimized assembly inner loop, easy-to-use scripts to execute the
code on the instruction-accurate ISS, and supporting files and documentation.

"Our ISS leverages established tool chains for the MIPS instruction set architecture*, adding high-performance DSP capabilities unrivaled in a licensable intellectual property product," said Sam Rosen, principal DSP architect of Lexra.

To assist in evaluating the core, Lexra is providing a Web-based seminar on its Web site describing the hardware architecture, instruction set and software development tools for the LX5280. "Placing our seminar and ISS on the Web allows new customers to learn first-hand the strength of our processor and tool chain – even before they contact Lexra," Rosen stated.

In addition to the instruction-accurate ISS, Lexra also provides a cycle-accurate ISS for in-depth code profiling. With the cycle-accurate ISS, designers can evaluate the performance of the 5280 running actual program code.

The full evaluation of the tool suite, including the cycle-accurate ISS and the interfaces to the Green Hills MULTI-2000 Integrated Development environment, can be mailed to the customer based on a request generated via Lexra's Web site. Both versions of Lexra's ISS can be used from the Green Hill Software MULTI-2000 Integrated Development Environment (IDE) or from a command line interface. It is shipped with a PC version running on MS Windows 98, 2000 and NT, and a Unix version running on Solaris 2.6.

Price and availability:

The ISS is free-of-charge to customers registering on the Lexra Web site and will be available for download on Monday, June 26. The LX5280 RISC-DSP RTL core is currently available. License fees start at $495,000 plus a unit royalty of $1.95 per chip. The RTL core includes the Verilog database, synthesis scripts and a regression suite. The SmoothCore™ version of the LX5280 is also currently available for the TSMC 0.18-micron process.

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