Innoveda rolls out complete FPGA design environment
INNOVEDA ROLLS OUT COMPLETE FPGA DESIGN ENVIROMENT Sets New Standard for Efficiency in High-Density FPGA Design
Innovate FPGA Incorporates Powerful Visual HDL Tool and Choice of Tools from Leading Vendors
MARLBORO, Mass. - May 23, 2000- Innoveda, Inc. (Nasdaq: INOV), a leading provider of innovative software and services for the design of advanced electronic systems, today announced Innovate FPGA™, a complete design environment for high-density Field Programmable Gate Arrays (FPGAs). This advanced solution helps designers develop large-scale FPGAs faster than standard solutions through the combination of graphical Hardware Description Language (HDL) entry, logic synthesis and verification tools.
"Innovate FPGA sets a new standard in efficient design of large-scale FPGAs," said Philip Lewer, product marketing manager at Innoveda. "It brings together the industry?s leading tools to integrate the entire FPGA design environment - from capture through verification and synthesis, to place and route. For example, Innovate FPGA is the first FPGA tool suite to incorporate Visual HDL™, the industry?s leading graphical HDL entry tool."
The Innovate FPGA tool suite integrates Innoveda?s Visual HDL™, IntelliFlow™ and Fusion™ tools with FPGA synthesis tools such as FPGA Express™ or Synplify® from Synplicity, Inc., a company that provides leading-edge synthesis and verification products for FPGA and ASIC designers. Each tool performs a unique function in the design flow.
Pricing and Availability
The list price for Innovate FPGA, including Visual HDL, IntelliFlow, Fusion and FPGA Express, starts at U.S. $15,000 and is available immediately from Innoveda for the PC platform. Synplify is available from Synplicity.
Complete Design Environment
Visual HDL enables designers to graphically capture finite state machines, block diagrams, truth tables and flowcharts, rather than manually coding them in VHDL or Verilog. It simplifies and accelerates HDL-based design by automatically generating optimized HDL code for leading logic synthesis tools. A new feature in the Innovate FPGA solution is the ability to quickly go from graphics into FPGA implementation flows by launching the IntelliFlow flow manager.
How it Works
IntelliFlow unifies functional simulation, synthesis, place and route, and verification under a single user interface, regardless of target vendor or family. It presents easy-to-understand design flows for FPGA design. For simulation and verification, IntelliFlow uses Fusion to functionally simulate the VHDL or Verilog generated by Visual HDL and verify the FPGA's timing and functionality after place and route. IntelliFlow automatically passes the code provided by Visual HDL into synthesis for analysis, elaboration and optimization. Once synthesis is completed, IntelliFlow runs the FPGA vendor-provided place and route software on the synthesized netlist, and then generates a PCB symbol for instantiation onto a board-level schematic.
Innovate FPGA provides a seamless link from design capture into FPGA logic synthesis via IntelliFlow. From IntelliFlow, users can choose between the Synplify or FPGA Express synthesis engines.
Faster Design with Synplicity Integration
Synplify is a high-performance, sophisticated logic synthesis engine that utilizes proprietary Behavior Extracting Synthesis Technology (B.E.S.T.) to deliver fast, highly efficient FPGA and Complex Programmable Logic Device (CPLD) designs. "With designers under continued pressures to shorten the design cycle for high-density FPGAs, achieving faster design debug is critical," said Andy Haines, vice president of Marketing at Synplicity, Inc. "Through our initial partnership with Summit Design, we improved debug time by giving our mutual customers the ability to cross probe from HDL Analyst® into Visual HDL. Now, the integration of the Synplify® tool into Innoveda's IntelliFlow enables designers to quickly move from the debug stage to the implementation stage for multiple vendors, from a common GUI. As an added benefit, IntelliFlow?s automatic symbol generation capability allows Synplify customers to get from synthesis through place and route, and onto the PCB, with the click of a mouse."
Hierarchical Design with FPGA Express
FPGA Express, engineered by Synopsys and sold by Innoveda, offers powerful VHDL and Verilog HDL synthesis technology for high-density programmable logic. Advanced architecture-driven optimization algorithms enable designers to synthesize mixed language and schematic design source without sacrificing silicon resources or device performance. Visual HDL complements the new block level incremental synthesis (BLIS) capability in FPGA Express 3.4 by giving designers an easy way to partition their designs into blocks early in the design process.
Innoveda, Inc. is a leading provider of innovative software and services that help engineers visualize, design and build advanced electronic systems for telecommunications, transportation, computers and consumer electronics. The company enjoys a rich heritage of technical innovation from the merger of Viewlogic Systems, Inc. and Summit Design, Inc. This forms the foundation of Innoveda?s comprehensive eProduct (electronic product) solutions for system level design, design capture, board design and electromechanical design. Headquartered in Marlboro, Mass., Innoveda has offices worldwide. Additional information can be found at: www.innoveda.com
This press release includes forward-looking statements that are subject to a number of risks and uncertainties. All statements, other than statements of historical facts included in this press release, regarding Innoveda?s strategy, future operations, financial position, prospects, plans, goals and objectives of management are forward-looking statements. When used in this press release, the words "will", "believe", "anticipate", "intend", "estimate", "expect", "project", "plan" and similar expressions are intended to identify forward-looking statements, although not all forward-looking statements contain these identifying words. We cannot guarantee future results, levels of activity, performance or achievements, and you should not place undue reliance on our forward-looking statements. Our forward-looking statements do not reflect the potential impact of any future transactions or strategic alliances. Our actual results could differ materially from those anticipated in these forward -looking statements as a result of various factors, including the ability of Innoveda to successfully integrate the businesses of Viewlogic and Summit, the volatility of Innoveda?s quarterly results and the impact of financial charges related to the business combination of Viewlogic and Summit, the intense competition Innoveda faces, Innoveda?s ability to develop new products, and the other risks described in the registration statement on For S-4 (File No. 333-89491) filed on October 22, 1999, as amended, in Innoveda's most recent quarterly report on Form 10-Q and annual report on Form 10-K and other public filings made by Innoveda with the Securities and Exchange Commission, which factors are incorporated herein by reference.
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