MemCore Announces MemCore-ner, Your Only Web Location for Memory Interface Solutions Information
SANTA CLARA, Calif. -- June 22, 2007 -- MemCore Inc, the leading pure play Memory Controller IP solutions company, today announced the immediate availability of MemCore-ner, a comprehensive web location for memory interface solutions related news. MemCore-ner will include up to date information related to product announcements, partnerships, technology shifts, market analysis and any other important memory interface solutions important to system designers, ASIC and SoC architects, engineering managers and other key decision makers. MemCore-ner is located on the web at www.memcoreinc.com/memcore-ner.shtml
Initially, MemCore-ner will focus on DDR3 memory interface solutions, providing current information on key DDR3 News and Announcements, DDR3 Memory Information and Specifications, DDR3 Memory FAQs and Teardowns, DDR3 Memory Modules and Support Products. Also featured are MemCore authored white papers and application notes relating to memory interface solutions. A DDR3 related white paper, from MemCore is critically important for designers and managers looking to migrate from DDR2 to DDR3.
The white paper, authored by Raj Mahajan, Principal Architect at MemCore, is titled “Memory Design Considerations When Migrating to DDR3 Interfaces from DDR2”. In this paper Raj describes, in detail, the key differences between DDR2 and DDR3 devices. These differences have a significant impact on the way in which a designer would approach a DDR2 design in order to minimize the effort required to move to a DDR3 implementation. A variety of design suggestions, both at the board level and at the chip level will simplify the migration to DDR3 memory devices or modules.
MemCore-ner will be updated periodically as new DDR3 information becomes available and as new technologies are added. The next focus area for MemCore-ner is expected to be Low Power Memory Interface Solutions, so check back to MemCore-ner often to get the most up to date news and information on memory interface technology. Remember, MemCore-ner is your ONLY location for Memory Interface Solutions information.
About MemCore, Inc
MemCore is the first and only pure-play Memory Interface Solutions company. MemCore provides customers with Memory Controller IP, verification environments, customized back-end interfaces, memory models, hard and soft PHY and DLL timing components and applications support- everything a customer needs to successfully implement leading edge high-performance memory interface solutions. Visit MemCore at www.memcoreinc.com
|
Related News
- DDR5/DDR4/LPDDR5 Combo PHY IP Cores which is Silicon Proven in 12FFC with Matching Controller IP Cores is available for license to accelerate your Memory Interfacing Speeds
- Introducing PCIe 4.0 PHY IP Cores in 7nm for a reliable, Low area and High-Speed Interface Peripheral slot for all your High-End Devices
- JEDEC Updates Universal Flash Storage (UFS) and Supporting Memory Interface Standard
- Rambus Expands Portfolio of DDR5 Memory Interface Chips for Data Centers and PCs
- Enhance your High-Density data processing capabilities to new heights with the USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP Core interface in 28HPC+/HPC process technology
Breaking News
- Keysight, Synopsys, and Ansys Deliver Radio Frequency Design Migration Flow to TSMC's N6RF+ Process Node
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Leveraging Cryogenics and Photonics for Quantum Computing
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
- Credo at TSMC 2024 North America Technology Symposium
Most Popular
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
- Silicon Creations Reaches Milestone of 10 Million Wafers in Production with TSMC
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium
- Alphawave Semi: FY 2023 and 2024 YTD Trading Update and Notice of Results
E-mail This Article | Printer-Friendly Page |