MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes in TSMC (16nm) for Automotive
ECS develops new technology to facilitate System-on-Chip
Professor Bashir Al-Hashimi and his team at the University’s School of Electronics & Computer Science (ECS) have developed NIRGAM (Network-on-Chip Interconnect RoutinG and Applications Modelling), a simulator which will make it possible to easily connect up the various cores which exist within a System-on-Chip (SoC).
According to Professor Al-Hashimi, as the demand for more functionality from hand-held devices increases, the current interconnection techniques will not be adequate to support more powerful devices, due to limited bandwidth scalability.
'The microelectronics industry predicts that in 2008 SoCs will contain over 50 processing and memory blocks and this will increase to 100 cores in 2012,' he said.
This led to Professor Al-Hashimi and Professor Alex Yakovlev at the University of Newcastle securing funding from the Engineering and Physical Sciences Research Council (EPSRC) in 2005 to develop the next generation of interconnection technology for multiprocessor SoCs, from which NIRGAM has been developed.
‘The availability of such a simulator will be welcomed by the SoC and Network-on-Chip (NoC) research communities since it allows researchers to plug-in and experiment with different applications and routing algorithms using different traffic and topologies,’ said Professor Al-Hashimi. ‘The availability of such a simulator is vital for researchers since it will enable them to evaluate quickly their routing algorithms and applications on a NoC platform, and without the need to develop long programs.’
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