Pentek's New Digital Transceiver with Multiband DDC Core and Interpolation Filter Supports all Communication Bandwidths

• A complete software radio system
• Narrowband and wideband functions combined in unique quad DDC IP core
• Input and output signal bandwidths from 8 kHz to 40 MHz
• Decimation range from 2 to 65,536 and interpolation range from x2 to x32,768

Upper Saddle River, NJ -- November 9, 2007 -- Pentek, Inc., a pioneer in VME board-level technology, today released its Model 7142-428 Digital Transceiver with a Multiband Digital Downconverter (DDC) and Interpolation Filter. A complete software radio system in a COTS PMC/XMC module, this latest offering from Pentek is a combination of proven hardware and a new GateFlow® IP core. The Model 7142-428 employs four A/D converters and one D/A converter capable of bandwidths exceeding 40 MHz for connection to HF and IF ports in communications or radar systems.

In a transceiver, the decimation factor and interpolation factor determine the ratio between the IF frequency and the bandwidth of the received and transmitted signals. By offering a range of more than four orders of magnitude for both decimation and interpolation, the Model 7142-428 addresses an unprecedented range of commercial and military communication systems.

These communications systems include voice-band systems with 8 kHz channels through 1G, 2G and 3G wireless waveforms, and even the new emerging 4G standards with bandwidths to 20 MHz and higher. Worldwide markets for wireless Web access for both fixed and mobile digital services are fueling numerous wireless standards, each with unique signal requirements easily handled with this new product. The highly programmable bandwidths offered in the Model 7142-428 also make it ideally suited for military software-defined radio systems that require flexible hardware capable of emulating multiple radio waveforms.

"To summarize, we've taken a proven Pentek product, our Model 7142, and increased its performance to accommodate the growing number of communications standards our customers are looking for," says Rodger Hosking, vice president, Pentek. "The decimation and interpolation ranges in our Model 7142-428 cover virtually every requirement we've seen so far. Furthermore, this versatile new product can support systems being developed for new wideband radar and communication standards," he adds. "Because the Model 7142-428 incorporates highly optimized, world-class FPGA IP cores, fully supported with software drivers, our customers can eliminate FPGA development risks and get their systems to market on time," concludes Hosking.

Downconverting

Commercial DDC ASIC offerings are divided into two classes by their decimation range: above 32 for narrowband devices and below 32 for wideband DDCs. This limitation often forces customers to choose between DDCs or to use two devices to handle both classes. Instead, each of the four DDCs in the 428 IP core is implemented as two cascaded DDC stages, each with a programmable decimation of 1 to 256. Because the decimations from the two stages multiply, users can choose an overall decimation anywhere from 2 to 65,536. As a result, each of these "multi-band" DDC cores spans the decimation range of both wideband and narrowband DDCs, all in a single device.

The four down-converted DDC outputs are delivered to the PCI interface through independent FIFOs, each managed by its own DMA controller channel to simplify programming and improve data transfer rates.

Four 14-bit A/D converters at the front end operate at sample rates up to 125 MHz. Each of the four identical DDC engines uses an independent 4-input multiplexer to select any one of these four A/Ds as its input source. The four DDCs feature independent tuning and decimation to translate any frequency band at the input down to zero frequency.

Upconverting

On the upconverting side, a Texas Instruments DAC5686 offers a 500 MHz 16-bit D/A converter and a digital upconverter (DUC) operating at a sample rate of up to 320 MHz. The DUC has a built-in interpolation range of only x2 to x16. The Model 7142-428's IP core interpolation filter dramatically extends this rather limited range of interpolation by an additional factor of x2 to x2048, providing an overall range of x2 to x32768.

This extended DUC interpolation range nicely matches the DDC decimation capabilities of 2 to 65,536, offering symmetrical support for transmit and receive functions for signals of any given bandwidth. After interpolation, the DUC can be tuned to translate the baseband transmit signal frequency to any IF output frequency up to 140 MHz.

Software Support

All of the new Model 7142-428 IP core functions are fully supported by Pentek's ReadyFlow Board Support Packages (BSPs). Pentek's ReadyFlow BSPs simplify board operation and setup with easy-to-use function calls. ReadyFlow libraries offer flexibility and provide low-level access to all of the board's hardware. Pentek ReadyFlow BSPs and software development tools -- plus third-party offerings --will be available for a variety of operating systems, including Windows 2000/XP, Linux and VxWorks platforms.

All of these software resources enable full control of all new features of the GateFlow IP core of the Model 7142-428, including configuration of the data flow into and out of the new IP core and full access to operating parameters such as interpolation and decimation factors, DDC and DUC source selection, DDC tuning frequencies, filter coefficients, data formatting, and modes of operation.