CoWare and STARC Integrate SystemC TLM Methodology

New STARC TL Modeling Guideline Supports CoWare's Open SCML APIs and Enables STARC Adoption of CoWare's ESL 2.0 Solutions

SAN JOSE, Calif. -- January 21, 2008 -- CoWare®, Inc., the leading supplier of platform-driven electronic system-level (ESL) design software and services, announced the successful collaboration with the Semiconductor Technology Academic Research Center (STARC) in Japan to support CoWare’s open SystemC modeling library (SCML) APIs for the creation of highly reusable virtual platforms for architecture design and software development within CoWare’s ESL 2.0 environment using STARC’s new transaction-level (TL) modeling guideline.

STARC TL Modeling guidelines ensure cooperation between client companies involved in SoC developments and their ESL, EDA, IP suppliers, and design houses goes smoothly. The new TL Modeling Guideline, which describes an efficient design methodology enabling Japanese semiconductor companies to reuse SoC platform models at the system level, is based on industry standards from the Open SystemC Initiative (OSCI), the IEEE 1666™-2005 Standard for SystemC, and established practical de-facto standards for transaction-level model interoperability as recommended by the System Level Design Group of STARC. This work includes participation by engineers from leading companies driving the adoption of ESL design methods in Japan, including NEC Electronics, Oki Electric Industry, Renesas Technology, Sony, and Toshiba.

“SystemC has been widely adopted by the majority of systems and semiconductor companies in Japan for architectural optimization and verification and for early software development. At STARC, our goal is to help our member companies, and the electronics and semiconductor communities in Japan, to increase the leverage of their ESL design efforts by developing and providing TL Modeling guidelines,” said Yoshio Okamura, Vice President and General Manager, Development Department-2 STARC. “Following these guidelines will help streamline model creation and reuse for architecture design and software development, and the synthesis of RTL from SystemC.”

“As the leader in SystemC and TL modeling, it made perfect sense for STARC to use CoWare Platform Architect and IP models because they had already developed the SystemC Modeling Library (SCML) technology,” said Yahiro Shiotsuki, leader of the STARC ESL modeling project. “By using CoWare’s ESL 2.0 solutions, we were able to increase the leverage of SystemC modeling by making the models usable for cycle-accurate architectural optimization and early software development.”

“STARC’s RTL Design Style Guide is already widely used within SoC design teams in Japan. With the growing mainstream production use of ESL design methods, we believe the impact of STARC’s new TL Modeling guideline on transaction-level model interoperability and reuse will be of equal significance and value to the industry,” said Patrick Sheridan, director of marketing, CoWare. “CoWare is very pleased to support STARC in the development of the new TL Modeling guideline and help extend its benefit through the integration of openly accessible SCML APIs.”

STARC released their guideline manual to their sponsor companies in December, 2007, and will present their TL Modeling guideline results at the EDS Fair 2008 show in Yokohama, January 24-25. Designed to protect user investment in the highly reusable SystemC TLM peripherals created for use in CoWare Platform Architect and CoWare Virtual Platform, SCML API source code kits are openly available for download at www.coware.com for use in all IEEE 1666 SystemC compatible environments.

About STARC

The Semiconductor Technology Academic Research Center (STARC) was established in December 1995 with investment from Japan’s leading semiconductor suppliers to reinforce semiconductor design capability. Since its inception, STARC has been conducting joint research with universities and the semiconductor industry to strengthen the bases of research in the field of semiconductor technology at domestic universities. The outcomes of these activities are utilized industry-wide in Japan through the transfer of technologies to investing companies to help their businesses, the documenting of technical standards, and the licensing of technologies to partner companies for commercialization. Headquartered in Shin Yokohama, Japan, STARC is co-funded by 11 member companies including Fujitsu Limited, Matsushita Electric Industrial Co., Ltd., NEC Electronics Corporation, Oki Electric Industry Co., Ltd., Renesas Technology Corporation, Rohm Co., Ltd., Sanyo Semiconductor Co., Ltd., Seiko Epson Corporation, Sharp Corporation, Sony Corporation, and Toshiba Corporation. For more information about STARC and its research, visit http://www.starc.jp/index-e.html.

About CoWare

CoWare is the leading global supplier of platform-driven electronic system-level (ESL) design software and services. IP, semiconductor, and electronics companies use CoWare ESL 2.0 solutions to design better processor- and software-intensive products faster. CoWare solutions solve the new design challenges associated with platform architecture design, platform verification, application sub-system design, processor design, DSP algorithm design, and software development, and are based on open industry standards including SystemC. These solutions also enable IP and semiconductor companies to implement more effective go-to-market strategies. CoWare’s corporate investors include ARM [(LSE: ARM - News); (NASDAQ: ARMHY - News)], Cadence Design Systems (NASDAQ: CDNS - News), STMicroelectronics (NYSE: STM - News), and Sony Corporation (NYSE: SNE - News). CoWare is headquartered in San Jose, Calif., and has offices around the world. For more information about CoWare and its products and services visit http://www.coware.com.