Denali Software Premieres Verification IP for the New SuperSpeed USB Interface
SUNNYVALE, Calif., November 10, 2008 — Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced that its PureSpec™ verification intellectual property (VIP) product now supports the USB 3.0 specification from the USB 3.0 Promoter Group , allowing device and system designers to begin advanced USB 3.0 development. Denali’s PureSpec USB VIP product provides both design and verification engineers with a high-quality solution for modeling, simulating, and verifying designs that utilize the latest USB interface specification, enabling them to accelerate the design and verification of USB devices and systems.
“Denali has been a long-time supporter of USB technology and provider of verification IP solutions,” said Jeff Ravencraft, USB-IF president and chairman. “We are pleased to see this announcement from Denali, supporting the USB 3.0 specification, as it will help developers bring SuperSpeed USB products to market quickly and support compliance to the USB 3.0 specification with their USB VIP solutions.”
Denali's PureSpec VIP software for the USB interface supports the next-generation USB technology and specification as it continues to evolve. The USB 3.0 specification offers over 10x performance improvement and is fully backwards compatible with USB 2.0.
“Our customers are thrilled that we have enabled USB VIP for the next generation of USB, and thus can leverage Denali’s tools, experience and support with PCI Express and USB 2.0 to take advantage of the new SuperSpeed USB protocol,” states Sanjiv Kumar, director, Verification Products at Denali Software. “Our verification IP products not only support the next-generation interface requirements for design and verification of SuperSpeed USB devices and systems, but accelerate our customers’ design cycles time to market.”
About PureSpec USB 3.0 Verification IP
Denali’s PureSpec is the most widely-used verification IP product for verifying compliance and compatibility of USB designs. All PureSpec products are directly integrated into all popular EDA languages and verification environments including: Verilog, SystemVerilog, VHDL, C/C++, SystemC, 'e', OpenVERA. Quality, completeness and seamless integration with all modern verification environments, e.g., OVM, VMM, eRM, etc., make PureSpec the solution of choice for functional verification and interoperability validation of USB designs. A solid product platform, dedicated customer support, and unmatched EDA modeling and verification expertise make PureSpec USB the best-in-class verification IP solution. For more information about PureSpec USB, visit: www.denali.com/usb3.
About Denali Software
Denali Software, Inc., is a world-leading provider of electronic design automation (EDA) software and intellectual property (IP) for system-on-chip (SoC) design and verification. Denali delivers the industry's most trusted solutions for deploying PCI Express, NAND Flash and DDR DRAM subsystems. Developers use Denali's EDA, IP and services to reduce risk and speed time-to-market for electronic system and chip design. Denali is headquartered in Sunnyvale, California and has offices around the world to serve the global electronics industry. More information about Denali, its products and services is available at www.denali.com.
|
Related News
- Six Early Adopters Select USB 3.0 Verification IP From Denali Software
- Cypress, Nuvation and Arrow Electronics Introduce New USB 3.0 SuperSpeed Interface Board for Altera FPGAs
- Mentor Graphics Delivers Emulation Solutions for the Verification of USB SuperSpeed (3.0) Products
- Evatronix and Avery Announce Partnership for SuperSpeed USB 3.0 IP Development and Verification
- Arasan Chip Systems Releases SuperSpeed USB 3.0 Software Stacks
Breaking News
- Keysight, Synopsys, and Ansys Deliver Radio Frequency Design Migration Flow to TSMC's N6RF+ Process Node
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Leveraging Cryogenics and Photonics for Quantum Computing
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
- Credo at TSMC 2024 North America Technology Symposium
Most Popular
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
- Silicon Creations Reaches Milestone of 10 Million Wafers in Production with TSMC
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium
- Alphawave Semi: FY 2023 and 2024 YTD Trading Update and Notice of Results
E-mail This Article | Printer-Friendly Page |