32-Bit RISC-V Embedded Processor and Subsystem, Maps ARM M-0 to M-4. Optimal PPA,
Xilinx Releases 16 new parameterizable cores on IP Center for Virtex Series
Xilinx Releases 16 new parameterizable cores on IP Center for Virtex Series
SAN JOSE, Calif.----Nov. 30, 1999-- Xilinx, Inc. (NASDAQ: XLNX), today announced the availability of over 50 LogiCORE(TM) and AllianceCORE(TM) products and reference design for its Virtex-E and Virtex FPGA families from the Xilinx IP Center web site. The new IP includes the Real-PCI core and general-purpose LogiCORE products such as a Distributed Memory compiler and variable parallel multipliers.
All Xilinx LogiCORE and reference designs are available and downloadable from the Xilinx IP Center. The general-purpose cores contained in this update are loadable directly into the Xilinx CORE Generator and are implemented via the Smart-IP technology.
``The IP Center and the CORE Generator are the two critical components of our IP delivery mechanism,'' said Babak Hedayati, program director for Cores Solutions Marketing. ``By using the power of the Internet, Xilinx can introduce new cores and make them available world wide, instantly. Customers can then take advantage of these highly efficient cores through the CORE Generator.''
16 New Cores downloadable via the Xilinx IP Center
Design engineers can download the 16 new Xilinx cores directly from the Xilinx IP Center website. Once downloaded and installed, the new parameterizable cores are available to the user on the next invocation of the CORE Generator.
The Real PCI Core
The Real-PCI core includes Internet-accessible PCI cores for 64/66 PCI, 64/33 PCI, and 32/33 PCI using Virtex-E, Virtex, and Spartan(TM) FPGAs today. In addition to the PCI cores, a synthesizable PCI bridge reference design with basic DMA and BlockRAM-based FIFOs, and a Power Management Reference Design are released on the PCI Lounges on the Xilinx IP Center.
About the IP Center
The Xilinx IP Center, is an easy to use area on the Xilinx website, which offers complete IP solutions. These range from design reuse tools, free reference designs, LogiCORE and AllianceCORE products, DSP and PCI solutions, to IP implementation tools, specialized system-level services, and vertical application IP solutions. The Xilinx Smart-IP technology leverages the Xilinx architectural advantages, such as look-up tables (LUTs), distributed RAM, segmented routing, logic mapping, and relative location constraints. This technology provides the best physical layout, predictability, and performance for significantly reduced compile times over competing architectures.
Xilinx is the leading innovator of complete programmable logic solutions, including advanced integrated circuits, software design tools, predefined system functions delivered as cores, and unparalleled field engineering support. Founded in 1984 and headquartered in San Jose, Calif., Xilinx invented the field programmable gate array (FPGA) and fulfills more than half of the world demand for these devices today. Xilinx solutions enable customers to reduce significantly the time required to develop products for the computer, peripheral, telecommunications, networking, industrial control, instrumentation, high-reliability/military, and consumer markets. For more information, visit the Xilinx web site at www.xilinx.com.
Note to Editors: Other brands or product names are trademarks or registered trademarks of their respective owners.
Contact:
Xilinx, Inc.
Ann Duft, 408/879-4726 (Editorial)
publicrelations@xilinx.com
Jim Burnham, 408/879-4971 (Public Marketing)
jimburnham@xilinx.com
Related News
- Xilinx Releases Planahead v2.1 Tool With Up To 89% Increase In Clock Frequency For Virtex Series FPGAs
- Chevin Technology releases 25G Ultra Low Latency MAC/PCS for Xilinx Virtex UltraScale FPGAs
- Xilinx Transceiver Breakthrough Brings Greater Cost Efficiency to Data Center Interconnects
- Xilinx Virtex Series FPGAs Surpass $5B in Revenue
- Xilinx Virtex Series Surpasses Three Billion In Revenue
Breaking News
- Keysight, Synopsys, and Ansys Deliver Radio Frequency Design Migration Flow to TSMC's N6RF+ Process Node
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Leveraging Cryogenics and Photonics for Quantum Computing
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
- Credo at TSMC 2024 North America Technology Symposium
Most Popular
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
- Silicon Creations Reaches Milestone of 10 Million Wafers in Production with TSMC
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium
- Alphawave Semi: FY 2023 and 2024 YTD Trading Update and Notice of Results
E-mail This Article | Printer-Friendly Page |