English
Silicon Line extends its ultra-low power technology with world-record setting SerDes IC
Silicon Line introduces a 2.3 Gbps SerDes-IC for video or arbitrary data transport in mobile electronic devices, consuming less than 4 mW at maximum clock rate
Munich, Germany -- April 28, 2009 -- Silicon Line GmbH, a provider of ultra-low power analog ICs, today announced that it extends its ultra-low power technology to the serializer / de-serializer ICs (SerDes) markets with the release of its new programmable ultra-low power SerDes chip - the SL83000.
The device can either be used to convert a 27-bit wide parallel input interface into a single, high-speed differential output data stream or it can be programmed to de-serialize high-speed serial input data to a 27-bit wide parallel output signal.
Besides any arbitrary parallel input data, the SL83000 was optimized to handle the conventional and widely used 24-bit wide data bus for RGB video data, plus horizontal synchronization (HS) and vertical synchronization (VS) signals as well as a data enable (DE) signal.
The SL83000 consumes less than 4 mW if operated as serializer or even less than 2 mW if set to the deserializer mode.
The serial data link speed of the SL83000 may range to far beyond 2.3 Gbps allowing for pixel clocks in excess of 72 MHz or screen resolutions up to the HD1080i format.
The device was optimized for optical video data transport applications in power sensitive system environments, such as battery operated portable electronic systems. However, it may also be connected to a single differential line with a characteristic impedance of 100 Ohm.
"With the SL83000 Silicon Line introduces a new IC, which seamlessly integrates in existing mobile phone or laptop computer system architectures", said Holger Hoeltke, Managing Director at Silicon Line.
“The SL83000 allows customers to decide whether they’d like to transport their video data between the graphic processor and the display over one thin plastic optical waveguide or over one single twisted pair. Both alternatives remove the bulky bundle of tens of exiting data lines within the tight hinge, making room for new cables, new applications", Hoeltke added.
The device comes in an extremely small 3 mm x 3mm x 1mm µBGA-42 package, which currently presents the world-wide smallest package with this pin count.
For less area sensitive applications the SL83000 is offered in a standard VQFN-48 package, as well.
About Silicon Line GmbH
Silicon Line is a Germany based fabless analog IC company, specialized in providing innovative, ultra-low power IC solutions in standard CMOS-technology. Silicon Line is located at Elsenheimerstrasse 50, D-80687 Munich, Germany.
Additional information is available at www.silicon-line.com.
Munich, Germany -- April 28, 2009 -- Silicon Line GmbH, a provider of ultra-low power analog ICs, today announced that it extends its ultra-low power technology to the serializer / de-serializer ICs (SerDes) markets with the release of its new programmable ultra-low power SerDes chip - the SL83000.
The device can either be used to convert a 27-bit wide parallel input interface into a single, high-speed differential output data stream or it can be programmed to de-serialize high-speed serial input data to a 27-bit wide parallel output signal.
Besides any arbitrary parallel input data, the SL83000 was optimized to handle the conventional and widely used 24-bit wide data bus for RGB video data, plus horizontal synchronization (HS) and vertical synchronization (VS) signals as well as a data enable (DE) signal.
The SL83000 consumes less than 4 mW if operated as serializer or even less than 2 mW if set to the deserializer mode.
The serial data link speed of the SL83000 may range to far beyond 2.3 Gbps allowing for pixel clocks in excess of 72 MHz or screen resolutions up to the HD1080i format.
The device was optimized for optical video data transport applications in power sensitive system environments, such as battery operated portable electronic systems. However, it may also be connected to a single differential line with a characteristic impedance of 100 Ohm.
"With the SL83000 Silicon Line introduces a new IC, which seamlessly integrates in existing mobile phone or laptop computer system architectures", said Holger Hoeltke, Managing Director at Silicon Line.
“The SL83000 allows customers to decide whether they’d like to transport their video data between the graphic processor and the display over one thin plastic optical waveguide or over one single twisted pair. Both alternatives remove the bulky bundle of tens of exiting data lines within the tight hinge, making room for new cables, new applications", Hoeltke added.
The device comes in an extremely small 3 mm x 3mm x 1mm µBGA-42 package, which currently presents the world-wide smallest package with this pin count.
For less area sensitive applications the SL83000 is offered in a standard VQFN-48 package, as well.
About Silicon Line GmbH
Silicon Line is a Germany based fabless analog IC company, specialized in providing innovative, ultra-low power IC solutions in standard CMOS-technology. Silicon Line is located at Elsenheimerstrasse 50, D-80687 Munich, Germany.
Additional information is available at www.silicon-line.com.
|
||||||
Related News
- 12bit 2Msps Silicon proven SAR ADC IP Core with Ultra-low power is available in different technology nodes for various applications that includes IoT, Medical, Consumer, etc
- Analog Bits to Demonstrate New High Performance and Ultra-Low Power SERDES IP at TSMC Open Innovation Platform Ecosystem Forum
- Kilopass Ultra-Low Power OTP NVM Provides Storage for Northrop Grumman Advanced Silicon Processor That Prevents Counterfeit Electronic Parts Entering DoD Supply Chains
- Ultra-low power memory generators silicon proven at TSMC 55 nm uLP and uLP eFlash
- Think Silicon Launches NEMA|PICO The World Smallest, Most Ultra-Low Power and Cost Efficient 2D GPU at CES 2016
Breaking News
- Silicon Creations Reaches Milestone of 10 Million Wafers in Production with TSMC
- Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium
- T2M-IP Unveils Revolutionary MIPI D-PHY & DSI Controller IP Cores with speed 2.5Gbps/lane, Redefining High-Speed Data Transfer and Display Interfaces
- Omni Design Technologies Joins Intel Foundry Accelerator IP Alliance
- Efabless Announces the Release of the OpenLane 2 Development Platform, Transforming Custom Silicon Design Flows
Most Popular
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Omni Design Technologies Joins Intel Foundry Accelerator IP Alliance
- Faraday Partners with Arm to Innovate AI-driven Vehicle ASICs
- Semiconductor Capacity Is Up, But Mind the Talent Gap
- Efabless Announces the Release of the OpenLane 2 Development Platform, Transforming Custom Silicon Design Flows
|
E-mail This Article | 
|
|
Printer-Friendly Page |