Denali Turbo-charges Rambus; Compaq's 'in'

Rambus DRAM is a memory subsystem that promises to transfer up to 1.6 billion bytes per second. The subsystem consists of the RAM, the RAM controller, and the bus that connects the RAM to the microprocessor and other devices in the computer that use it.

"RD RAM has a new packet-based protocol," said Srivastava. "We created the new technology so customers could take full advantage of Rambus' performance. Turbo Channel allows them to build Rambus applications that are faster, and it offers them better memory-system debugging capabilities."

According to Srivastava, the Turbo Channel model, written in C, implements techniques for performance optimization when the Rambus Channel being modeled has many components connected to the channel.

The Turbo Channel model costs $5,000. Denali's RDRAM Verification kit, with the Turbo Channel model and Denali's AutoTest automatic-test-vector generation program and debugging software, costs $80,00.

Denali models and tools run on Windows and Unix platforms. See www.denalisoft.com.

---

Phoenix Technologies Ltd. (San Jose) has introduced a 10/100 Fast Ethernet medium-access controller (MAC) soft core featuring the Virtual Component Interface (VCI), a standard bus interface defined by the VSI Alliance to ease the integration of IP components onto one chip.

The company said the MAC core is the first offering in a planned family of interconnect cores that will use the VCI standard. The core complies with IEEE 802.3 and 802.3 specs and supports 10- and 100-Mbit/second data transfer.

The core also supports both full- and half-duplex modes, offering the CSMA/CD protocol for half-duplex operation and flow control (IEEE 802.3) for full-duplex operation.

According to Phoenix, the basic functionality of the core is fully implemented in hardware, eliminating the requirement for software drivers.

Features that are described as extending beyond basic MAC functionality include station management for PHY control, RMON network-management support, address filtering, clock synchronization, data handling and virtual-LAN support.

The company said the core is silicon-proven and undergoing compliance testing at the University of New Hampshire's Ethernet Interoperability Lab. Visit www.phoenix.com.