Magillem, provider of the "one of a kind" IP-Reuse based SOC design methodology, expands its operations in Japan.

Magillem’s new Branch is conveniently located in Tokyo’Shinagawa .

Tokyo, January 18, 2010. - Electronic Design engineers use plenty of powerful EDA point tools at each step of their design flow. What had been missing, until the new xml web based technologies have allowed for it, is a truly automated methodology to simplify design management and control, accelerate products-time- to- market, preserve IP integrity and Re- Usability and reduce the global cost of complex design.

Magillem sees a very strong opportunity on the Japanese market as its platform is well adapted to the current economic outlook and the strategic development plans of the major Japanese corporations

Not just another EDA vendor, Magillem is an enabler of production level IP-Reuse- based design method and the leading provider of IEEE 1685 (IP-XACT) compliant tools and services. Magillem has developed an easy to use, state of the art platform solution to cover electronic systems design flow challenges in a context where complexity, interoperability and design re-use are becoming critical issues to manage design cycle time of SOC.

Main benefits include:

Maximizing Design and IP Re-use
Using a virtual platform to configure their system and IPs
Controlling the Design Flow
Exploring their Design Flow architecture and optimizing it
Improving their independence from CAD tools vendors
Improving interoperability, communication
Benefiting from better user interfaces to raise productivity
Relying on worldwide adopted standards

Magillem has a long list of first tier active customers: Texas Instrument, Qualcomm, ST Microelectronics, NXP (ex- Philips semiconductors), ST-ERICSSON, Sonics, ESA, Thales, EADS … trust Magillem for their corporate Flow Design platform.

The Magillem Platform

Magillem is introducing the Magillem Suite 5.0 .This new release, built on the latest version of the Eclipse® 3.4 development environment includes numerous new features, such as:

Reworked GUI for enhanced user-friendliness
Collaborative/concurrent features enabling multiple users to work on same platform
New schematic editor for platform assembly and debug of very complex hierarchical platforms
Easy drag and drop of instance at different hierarchy levels
Analog and mix design options
Best-in-class Registers management functions including Magillem generators suite for registers
Scripting assembly in TCL or Java

Magillem’s value proposition based on customers’ testimonials is lying into: The robustness of the tools used in production chip design at multiple multi-billion dollar semi companies, a flexible business model aligning with customers requirements, our expert knowledge in IEEE1685 (IP-XACT) available as hands on or consulting services, a strong roadmap supporting both RTL and ESL design flow, and very responsive support people. From its inception Magillem has devoted a strong commitment to the IP-XACT standard, which is now to be IEEE-1685 standard.

About Magillem

Magillem Design Services SA was established in November 2006 and privately funded by a group of 8 co-founders: engineers and business angels. Company is headquartered in Paris, France, with office in New York, USA.

21 R&D people, sales channel: directly or thru partners to large companies. Magillem is a public company traded on the Euronext Free Market.

For further information please visit www.magillem.com.

About IEEE 1685 (IP-XACT)

IP-XACT is an undisputed worldwide XML format that defines and describes electronic components and their designs. IP-XACT was created by the SPIRIT Consortium, now part of Accellera, as a standard to enable automated configuration and integration through tools. 120 industrial companies and organizations, including STARC, are members! The goals of the standard are:

to ensure delivery of compatible component descriptions from multiple component vendors,
to enable exchanging complex component libraries between electronic design automation (EDA) tools for SoC design (design environments),
to describe configurable components using metadata, and
to enable the provision of EDA vendor-neutral scripts for component creation and configuration (generators, configurators).