Universal Chiplet Interconnect Express (UCIe 1.0) Controller
Lattice Semiconductor Raises Guidance for First Quarter 2010 on Robust Growth
HILLSBORO, OR, Mar 03, 2010 -- Lattice Semiconductor (NASDAQ: LSCC) today announced updated guidance for the first quarter ending April 3, 2010.
- First quarter revenue is now expected to increase by approximately 21% to 25%, sequentially. This upward revision compares to previous guidance that first quarter revenue would be up 8% to 12%, sequentially. The revision is based on robust growth across all product lines and continued strength in the Company's order bookings throughout the quarter.
- Gross margin percentage is expected to be approximately 55% to 57% of revenue, upwardly revised from our prior guidance of approximately 54% to 56%.
- Total operating expenses are now expected to be approximately $30.0 million. The increase compared to prior guidance of $29.0 million is primarily due to costs related to the acceleration of certain R&D activities, and an increase in sales related expenses.
- Lattice reiterates its expectation for continued profitability in the first quarter of 2010.
No conference call will be held in conjunction with this guidance update. Additional information related to the first quarter will be available when the Company reports its first quarter 2010 results.
About Lattice Semiconductor:
Lattice is the source for innovative FPGA, PLD, programmable Power Management and Clock Management solutions. For more information, visit www.latticesemi.com.
|
Related News
- Lattice Semiconductor Reiterates Guidance for Second Quarter 2010
- Lattice Semiconductor Reports First Quarter 2010 Results; Exceeds Upwardly Revised Guidance
- Lattice Semiconductor Reports First Quarter 2011 Results; Exceeds High-End of Prior Revenue Guidance
- Lattice Semiconductor Reports Third Quarter 2010 Results
- Lattice Semiconductor Reports Second Quarter 2010 Results; Achieves Further Sequential Gains in Revenue, Gross Margin, Net Income and Cash Flow From Operations
Breaking News
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- SEMIFIVE Starts Mass Production of its 14nm AI Inference SoC Platform based Product
- VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
- TASKING and Andes Announce FuSa Compliant Compiler Support for Andes RISC-V ASIL Compliant Automotive IP
- Efabless Launches an "AI Wake Up Call" Open-Source Silicon Design Challenge
Most Popular
- Intel and Arm Team Up to Power Startups
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- Renesas Introduces Industry's First General-Purpose 32-bit RISC-V MCUs with Internally Developed CPU Core
- SmartSoC Solutions Joins TSMC Design Center Alliance to Boost Semiconductor Innovation in India
E-mail This Article | Printer-Friendly Page |