In-System Emulation Technology VarioTAP supports ARM11 Core

GOEPEL electronic has developed a dedicated model library for processors with ARM11 architecture that supports the innovative emulation technology VarioTAP.

August 18, 2010 --GOEPEL electronic, worldwide leading vendor of JTAG/Boundary Scan solutions compliant to IEEE1149.x has developed a dedicated model library for processors with ARM11® architecture that supports the innovative emulation technology VarioTAP®. The libraries, described as VarioTAP® models, are structured modularly as intelligent IP and enable a complete fusion of Boundary Scan test and JTAG emulation. Employing this technology, embedded or external Flash can be in-system programmed via the native processor function. Furthermore, VarioTAP® supports interlaced Bus Emulation Tests (BET) and System Emulation Tests (SET) for extended JTAG/Boundary Scan functionality. “The new VarioTAP® models supporting the ARM architecture are another important step towards the fast VarioTAP® technology qualification for all ARM cores”, says Steffen Koehler, team manager Emulation Test in GOEPEL electronic’s JTAG/Boundary Scan Division. “In completed customer projects in telecommunication and multimedia, they enable a significant increase in fault coverage as well as Flash programming speed on a unique platform compared to hitherto utilised instrumentations.“

The VarioTAP IP-models for ARM11 will constantly be extended, and can be used for all implementations of these cores into respective MCU of chip providers. A multitude of possible configurations incl. multi-processor and multi-core applications are supported. The adaptive streaming technology of the TAP signals allows emulation tests to be carried out in parallel or interactively to Boundary Scan tests within a test program.

In the flash programming both NOR and NAND flash are supported, whereas the so-called bad block handling can be realised in a standardised or customised version.

The use of VarioTAP® does not require expert background knowledge, additional development tools or processor-specific pods, which makes the handling easy and uncomplicated.

Due to the OEM cooperation with all leading vendors of In-Circuit Testers (ICT), Manufacturing Defect Analysers (MDA), Flying Probe Testers (FPT) and Functionality Testers (FCT), the new solution is available for production with immediate effect.

The new VarioTAP® IP-models are supported beginning with SYSTEM CASCON™ version 4.5.3 and are activated by the licence manager like the system software. SYSTEM CASCON™ is a special JTAG/Boundary Scan development environment designed by GOEPEL electronic with currently 45 completely integrated ISP, test and debug tools. In regard to hardware, VarioTAP® is supported by the controllers of the SCANBOOSTER® series and the hardware platform SCANFLEX®.