Ridgetop Group Offers IP License Rebate to Celebrate its Participation in Altera's AMPP Partnership Program
TUCSON, Ariz.-- February 17, 2011 -- Ridgetop Group Inc., a leading designer of proven electronic prognostic tools such as the real-time ball grid array (BGA) health monitoring IP block, Solder Joint Built-In Self-Test™ (SJ BIST™), is celebrating its joining Altera Corporation’s AMPP℠ intellectual property (IP) partnership program by offering a special license fee rebate. Altera now lists SJ BIST prognostic monitoring of BGAs in its FPGA IP partner library. This partnership enables Altera’s customers to easily locate and insert Ridgetop’s validated SJ BIST health monitoring IP into their critical applications. SJ BIST is listed in Altera’s IP partners library at http://www.altera.com/products/ip/ampp/ampp1.html.
Ridgetop’s Director of Sales, Phil Davies, commented, “We are pleased to extend a special invitation to all Altera customers to take advantage of Ridgetop joining this program. In celebration, Ridgetop will rebate 25% of the list price for each SJ BIST IP Evaluation License fee for Altera’s FPGA customer orders received through March 31, 2011. This temporary offer allows customers to confirm the value of Ridgetop’s embedded real-time SJ BIST sensor IP by applying it in their critical deployed products, or in initial accelerated lifecycle testing of BGA and CGA packages, stacked chips and flip chips.” Call your local Ridgetop sales representative or contact marketing@ridgetopgroup.com for details and conditions of this special offer.
FPGAs are widely used for their flexibility and ease of use in electronic designs. Using high-density ball grid array (BGA) packages, the devices rely upon individual solder balls to attach the FPGA to a printed circuit board (PCB). Ridgetop’s unique patented method incorporates an easily instantiated real-time monitoring technique for FPGAs used in harsh, high-vibration environments where early detection of problems is warranted. Ridgetop provides a prognostic sensor for monitoring these solder joints with its SJ BIST product, which has been rigorously tested by major U.S. government prime contractors and NASA.
About Ridgetop Group
Based in Tucson, Arizona, Ridgetop Group is the world leader in providing advanced electronic prognostics and health management (ePHM) solutions, semiconductor IP blocks, and built-in self-test (BIST) solutions for critical applications. The company maintains business divisions for advanced radiation-hardened microelectronics, and electronic prognostics and health management (PHM) solutions for critical electronic sensing and control applications. Founded in 2000, Ridgetop has built an impressive list of aerospace, automotive and medical system customers in North America, Europe, and Asia. For more information, please visit www.RidgetopGroup.com or contact Phil Davies, Director, Sales and Marketing at 520-742-3300.
|
Ridgetop Group, Inc. Hot IP
Related News
- Ridgetop Group Joins Altera's AMPP Third-party IP Program
- Ridgetop Group's SJ BIST Solder Joint Fault Monitor to be Flight-Tested by NASA Research Center
- D'Crypt to Launch Gigabit Rijndael Cores under Altera Megafunction Partners Program (AMPP)
- DMP Joins Altera's Design Services Network Program
- Altera's OpenCL for FPGAs Program Delivers Dramatic Reductions in Development Times for Early Customers
Breaking News
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
- Controversial former Arm China CEO founds RISC-V chip startup
- Fundamental Inventions Enable the Best PPA and Most Portable eFPGA/DSP/SDR/AI IP for Adaptable SoCs
- Cadence and TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
- Numem at the Design & Reuse IP SoC Silicon Valley 2024
Most Popular
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Qualitas Semiconductor Appoints HSRP as its Distributor for the China Markets
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
E-mail This Article | Printer-Friendly Page |