Upgraded PUF-based Crypto Coprocessor (Compliant with TLS 1.3 / FIPS 186-5)
Intel tips 22-nm tri-gate, but mobile is MIA
Mark LaPedus, EETimes
5/4/2011 1:22 PM EDT
SAN FRANCISCO - As expected, Intel Corp. Wednesday (May 4) rolled out its 22-nm process—with a twist.
The chip giant introduced the process, based on its long-awaited 3-D transistor design, dubbed tri-gate. First disclosed by Intel in 2002, the tri-gate transistor will form the basis of its 22-nm node. Intel also demonstrated the world's first 22-nm microprocessor, codenamed Ivy Bridge.
Ivy Bridge-based Core family processors will be the first high-volume chips to use tri-gate transistors. Ivy Bridge is slated for high-volume production readiness by the end of this year.
But missing from the announcement was a 22-nm mobile processor, which could fend off competitive threats from the ARM camp.
E-mail This Article | Printer-Friendly Page |
|
Related News
- Intel's 22-nm tri-gate SoC, how low can you leak?
- Tabula Confirms Move to Intel's 22nm Process Featuring 3-D Tri-Gate Transistors
- Intel Custom Foundry Certifies Cadence Implementation and Signoff Tools for 10nm Tri-Gate Process
- Intel Custom Foundry Certifies Mentor Graphics Physical Verification and Circuit Simulation Tools for 10nm Tri-Gate Process
- Intel Custom Foundry Certifies Synopsys Implementation and Signoff Tools for 10-nm Tri-Gate Process
Breaking News
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- SEMIFIVE Starts Mass Production of its 14nm AI Inference SoC Platform based Product
- VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
- TASKING and Andes Announce FuSa Compliant Compiler Support for Andes RISC-V ASIL Compliant Automotive IP
- Efabless Launches an "AI Wake Up Call" Open-Source Silicon Design Challenge
Most Popular
- Intel and Arm Team Up to Power Startups
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- Renesas Introduces Industry's First General-Purpose 32-bit RISC-V MCUs with Internally Developed CPU Core
- SmartSoC Solutions Joins TSMC Design Center Alliance to Boost Semiconductor Innovation in India