Small-size ISP (Image Signal Processing) IP ideal for AI camera systems.
Ashling launches initiative on multi-core SoC debugging
Related News
- picoChip launches new family of cost-effective multi-core DSP chips for next-generation wireless, breaks $1/GMAC barrier
- FS2 System Navigator Delivers Multi-Core Debugging for Tensilica Xtensa Processors
- ARM Launches New RealView Debug Solutions For Multi-Core Systems
- 3DSP and CoWare Partner to Strengthen Design Processes and High-Level Verification for Multi-Core DSP SoC Solutions
- Imagination launches multi-core IMG Series4 NNA - the ultimate AI accelerator delivering industry-disruptive performance for ADAS and autonomous driving
Breaking News
- China's Intel, AMD Ban Helps Local Rivals, Analysts Say
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- SEMIFIVE Starts Mass Production of its 14nm AI Inference SoC Platform based Product
- VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
- TASKING and Andes Announce FuSa Compliant Compiler Support for Andes RISC-V ASIL Compliant Automotive IP
Most Popular
- Intel and Arm Team Up to Power Startups
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- Renesas Introduces Industry's First General-Purpose 32-bit RISC-V MCUs with Internally Developed CPU Core
- SmartSoC Solutions Joins TSMC Design Center Alliance to Boost Semiconductor Innovation in India
E-mail This Article | Printer-Friendly Page |