Cadence halts sales of Cierto VCC co-design tool
Cadence halts sales of Cierto VCC co-design tool
By Michael Santarini, EE Times
March 25, 2002 (4:56 p.m. EST)
URL: http://www.eetimes.com/story/OEG20020319S0025
SAN MATEO, Calif. Cadence Design Systems Inc. has halted sales of Cierto Virtual Component Co-design, its hardware/software co-design tool, through its regular sales channels and plans to release a new version that's easier to use later this year. The highly-touted product, introduced in January 2000, was said to allow designers to develop platform hardware and software at the system level, though was said to be difficult to use. The concept for Cierto VCC came from Cadence Berkeley Labs, and the version of the tool that is no longer being sold was developed at Cadence. Its difficulty for users required Cadence to bundle services with seats of the tool. Mike O'Reilly, director of marketing for System and Functional Verification at Cadence, said the company is going to revise the tool to make it more suitable to the mass market of design engineers, rather than a narrower aud ience of system architects. O'Reilly said the company plans to make the tool's system-level modeling features easier to use for hardware designers, and will revise its driver development utilities for software designers. Cadence will also allow the new version of the tool to run on up-and-coming system-level design languages, O'Reilly said, though he declined to say which ones. Open SystemC and Superlog are obvious candidates. In the meantime, Cadence will sell extra seats of the current version of Cierto VCC to current users and will offer it through its services division, though not through its regular sales channels, O'Reilly said. O'Reilly said the product has 20 customers and that Cadence has sold over 500 seats of the tool. Cierto VCC customers include Nokia, Ericsson, BMW, Motorola, Phillips and Texas Instruments.
Related News
- STMicroelectronics selects Cadence's Virtual Component Co-Design (VCC) <!-- verification -->
- Space Codesign Systems to Release Version 2.4
- New Integration Between SpaceStudio Hardware Software Co-design and European Space Agency’s TASTE Tool Set
- Toshiba announces co-design/co-verification platform for collaborative development of chip, package and PCB system
- Cochlear Limited Selects AMI Semiconductor to Co-Design and Manufacture Future Generation DSP Based System-on-Chip for Cochlear Implants
Breaking News
- Omni Design Technologies Joins Intel Foundry Accelerator IP Alliance
- Efabless Announces the Release of the OpenLane 2 Development Platform, Transforming Custom Silicon Design Flows
- TSMC Reports First Quarter EPS of NT$8.70
- Brisbane Silicon publishes DPTx 1.4 IP Core
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
Most Popular
- U.S. Subsidy for TSMC Has AI Chips, Tech Leadership in Sight
- Cadence Unveils Palladium Z3 and Protium X3 Systems to Usher in a New Era of Accelerated Verification, Software Development and Digital Twins
- Zhuhai Chuangfeixin: OTP IP Based on 90nm CMOS Image Sensor Process Technology Successfully Mass Production
- Silvaco Announces Expanded Partnership with Micron Technology
- OPENEDGES Unveils ENLIGHT Pro: A High-Performance NPU IP Quadrupling its Previous Generation's Performance
E-mail This Article | Printer-Friendly Page |