OCP-IP Delivers Enhanced Transaction Generator Package
New Version Now Includes 8 New Traffic Models from Hong Kong University
BEAVERTON, Ore.--May 22, 2012 --Open Core Protocol International Partnership (OCP-IP) announces the availability of an enhanced version of their Transaction Generator (TG), which is a transaction level (TL) SystemC simulator for benchmarking network-on-chips (NoCs) used in multiprocessor system-on-chip (SoC) applications. The latest version now includes 8 new traffic models from Hong Kong Universitys MCSL Benchmark Suite v1.1.
The work on this Transaction Generator, 8 new models from Hong Kong University and DRAM package by our Network on Chip Working Group showcases co-operation and collaboration among both our industry and academic researchers, ensuring synergy advantages in the field of NoCs
MCSL includes two kinds of traffic patterns: recorded and statistical. Both use task communication graph model which is converted into TGs native format automatically before simulation. These models are fine-grained having dozens or even hundreds of tasks and hence are suitable for benchmarking large systems. The default mappings utilize 16, 32 and 64 processing elements. Applications include, video processing, robot controller, and more.
In addition to the eight new models from Hong Kong University, the TG also includes a basic set of 9 traffic models from the multimedia and telecommunication domain, as well as Accurate DRAM Models. Together, these integrated models enable accurate representation of performance of systems and enable a realistic evaluation of Networks on Chip.
The new TG is freely available to both OCP-IP members and non-members alike through GNU LGPL, and is an ideal addition to all system-level designers evaluating various interconnection solutions in a simulation model of a real, complex system. It can also be used to simulate IP blocks before real implementations are available which enables the design of interconnect and implementation of IP blocks and SW for processors to advance in parallel, saving time, resources, and ensuring a faster time-to-market.
The work on this Transaction Generator, 8 new models from Hong Kong University and DRAM package by our Network on Chip Working Group showcases co-operation and collaboration among both our industry and academic researchers, ensuring synergy advantages in the field of NoCs, said Ian Mackintosh, president and chairman of OCP-IP. We are extremely proud to host our Working Group forum where the worlds most prestigious universities and industry researchers in the field of NoC investigation can come together.
The Transaction Generator with DRAM model kit and 8 new models from Hong Kong University were developed by Tampere University of Technology and Royal Institute of Technology (KTH) in conjunction with members of OCP-IPs Network on Chip Benchmarking working group including: Boston University, University of British Columbia, Carnegie Melon University, Washington State University, and Transylvania University in cooperation with industry members of the OCP-IP.
To download a copy of the Transaction Generator see, http://www.ocpip.org/tg_package.php
The Network on Chip Benchmarking Working Group has also issued an open call for Benchmarks to be distributed to researchers. NoC researchers may submit benchmarks from any application domain to be included. For more information on the call for benchmarks, please see http://www.ocpip.org/ocpspec_call_for_benchmarks.php
Institutions interested in joining the work of OCP-IPs Network on Chip Benchmarking Working Group should contact firstname.lastname@example.org
For the latest information on OCP-IP, please see our free newsletter at http://www.ocpip.org/newsletters.php
Formed in 2001, OCP-IP is a non-profit corporation promoting, supporting and delivering the only openly licensed, core-centric protocol comprehensively fulfilling integration requirements of heterogeneous multicore systems. The Open Core Protocol (OCP) facilitates IP core reusability and reduces design time, risk, and manufacturing costs for all SoC and electronic designs by providing a comprehensive supporting infrastructure. For additional background and membership information, visit www.OCPIP.org.