GloFo, TSMC report process tech progress
Rick Merritt, EETimes
6/5/2012 1:01 AM EDT
SAN FRANCISCO Globalfoundries reported progress ramping four flavors of its 28nm process and early work qualifying its 20 nm process and developing 3-D IC technology at the Design Automation Conference here. Its larger competitor TSMC also announced progress in the same three areas working in collaboration with Cadence Design Systems.
We just passed shipment of 400,000 32/28 nm high-k metal gate wafers and were ramping rapidly, said Mojy Curtis Chian, senior vice president of design enablement at Gobalfoundries in an interview with EE Times at DAC. We have proved gate first works, is high yielding and economical, he said.
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