USB V3.1 Power Delivery Type-C Port Evaluation board for OTI9108 IP
The fabless-foundry model will survive (at least through 14-nm)
Handel Jones, International Business Strategies Inc.,
EETimes (6/15/2012 6:59 PM EDT)
Editor's note: This article was rewritten in rebutal to comments made in April by Mark Bohr, an Intel Senior Fellow. As reported by EE Times, Bohr said the fabless-foundry model is"collapsing."
What are the problems?
1. Parametric yields at 28 nm are not at expected levels. Process variables such as random dopant fluctuations, line width and line gap variations, and via resistance, which affect RC-related timing issues, result in both unpredictable and low parametric yields for the targeted specifications. The process variables have increasing impact on leakage, power consumption and yields.
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