Dolphin Integration celebrates the grand opening of its Chinese center for transfer of know-how
Grenoble, France - June 22, 2012. Dolphin Integration has organized for transferring know-how, beyond FAE's hand-holding, in the form of "Case-study Tutorial Products (CTP). The goal is to offer a unique opportunity for local Chinese partners to benefit from the transfer of know-how needed for solving SoC and system performance issues at a time when it is crucial to reduce cost of application schematics more than silicon cost. This has led to open a center for transfer of know-how at the Universal Exposition Building of the French Rhône-Alpes region in Shanghai, China.
10-year anniversary of close relationships with Chinese Fabless Companies
Dolphin Integration SA, after developing the market of mixed-signal silicon IP in the 90's, realized that the future of microelectronics was emerging in China, with Shanghai as the cradle of the Chinese semiconductor industry. Its first commercial contract has been signed in March 2002 in Shanghai.
After ten years of IP-only commercial activities for helping a large number of Chinese partners develop optimal and high-performance SoC, Dolphin integration figured-out specific needs, improperly served locally, for early performance assessment by simulation prior to any Silicon fabrication and application PCB development.
Renewal of Integration and Application Engineering for Silicon IP support
Indeed, traditional Field Application Engineers (FAE) of IP vendors can only intervene in emergency to fix occasional issues for a given project. Besides, they cannot even forecast the impacted performances of IP, once embedded, at system level.
Such debugging practices do not guarantee that the same issue will not happen again on future projects and thus postpone tape-out schedules again. These facts have led Dolphin Integration to reassess integration and application engineering for transferring know-how to help our users maximize performances and production yield. This first session was fully booked and the participants have benefited from a transfer of know-how on integration and application issues such as clock jitter or power supply noise, plus warnings on traps and some tricks, to achieve the best tradeoff between cost and performance.
A celebration announcing promising innovations
During the opening ceremony at this new center for transfer of know-how, Sales Manager for China, Zhao Ying, has introduced the latest innovations of the company for logic designers: a block-busting design of register packs to boost RTL Engineering with Verilog macros, either synthesizable or generated as memories.
High-resolution Analog Front-Ends to fit application requirements were a key part of this event. Smartphone developers discovered the flexibility of splitting the analog from the logic of an audio converter to lower power consumption and cost.
As a fall-out of the mastery of high resolution converters, power metering drew attention for its optimized Power & energy Computation Engine. To this end MCU users found-out the new life of the 80x51 lineage enabled by application specific Whirl coprocessors.
For more information on Dolphin Integration innovations and transfer of know-how, feel free to contact your regional sales representative, through Ms. Zhao Ying at firstname.lastname@example.org
ABOUT DOLPHIN INTEGRATION
Dolphin Integration is up to their charter as the most adaptive and lasting creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation as well as independence and partnerships with Foundries. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components, such as mixed signal high-resolution converters for audio and measurement applications, Libraries of memories and standard cells, Power management networks, Microcontrollers. The strategy is to follow product launches with evolutions addressing future needs, emphasizing resilience to noise and drastic reductions of power-consumption at SoC level, thanks to their own missing EDA solutions enabling Support Engineering with Application Hardware Modeling as well as early Power and Noise assessment, plus engineering assistance for Risk Control
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