Peter Clarke, EETimes
7/19/2013 07:45 AM EDT
ARM's Cortex-A series of processors has now divided into three tiers associated with low, medium, and high performance. The high tier is optimized for performance, and the low tier is optimized for stripped-down power efficiency at lower absolute performance levels, all in support of the big-little and heterogeneous multicore processing.
At the 32-bit level these three tiers feature the A7, the A12, and A15, and the 64-bit level is represented by the Cortex-A57. The high efficiency processor is the Cortex-A53.
Does that mean the market should expect a series of mid-range parts in the Cortex-A5X series and going forward? Yes although ARM executives that I recently met with were also keen to keep their marketing powder dry. Does it mean that ARM is going to start implementing a big-medium-little processor core strategy? In the short term probably not, but I would like to assign that discussion for another day.
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