October 16, 2013 -- ARM® received the Partner Award from TSMC, in recognition of outstanding partner performance, during the 2013 TSMC Open Innovation Platform Ecosystem Forum. ARM was honored for its foundation intellectual property (IP), including ARM Artisan® memory, standard cells, input/output (I/O), and other fundamental building blocks for system-on-chip (SoC) design.
Dr. Cliff Hou, vice president of Research and Development at TSMC, presented the award to Dr. Dipesh Patel, executive vice president and general manager of the Physical IP Division at ARM.
The award is made based upon customer feedback, TSMC9000 compliance, general support, numbers of tape outs and number of wafers shipped. ARM and TSMC continue their collaboration to ensure customers achieve volume production of highly integrated SoCs in advanced silicon process nodes. This year the companies delivered the first ARM Cortex®-A57 processor tape out on TSMC’s 16nm FinFET process to support designs in mobile and enterprise markets requiring both high performance and energy efficiency.
The ARM and TSMC relationship helps optimize the next generation of ARM-based SoCs. This latest collaboration optimizes ARM Cortex-A50 series processors based on the ARMv8-A architecture (the first ARM architecture to execute both 32 and 64-bit instructions), ARM Artisan physical IP, and TSMC’s FinFET process technology.
ARM designs the technology that is at the heart of advanced digital products, from wireless, networking and consumer entertainment solutions to imaging, automotive, security and storage devices. ARM’s comprehensive product offering includes RISC microprocessors, graphics processors, video engines, enabling software, cell libraries, embedded memories, high-speed connectivity products, peripherals and development tools. Combined with comprehensive design services, training, support and maintenance, and the company’s broad Partner community, they provide a total system solution that offers a fast, reliable path to market for leading electronics companies.